On Fri, Mar 02, 2012 at 09:33:53PM +0100, Daniel Vetter wrote: > This is commit acc83eb5a1e0ae7dbbf89ca2a1a943ade224bb84
Oops, the "upstream." got cut away, i.e. this a stable submission for pre-3.2 kernels. -Daniel > Latest mesa relies on correctly detected swizzling for certain operations, > hence this patch needs to be applied to all kernels prior to v3.2. > Otherwise certain OpenGL features will not quite work correctly on > Sandybridge/Ivybdridge machines. > > Fixes tests/gem_tiled_pread on my snb. I know, mesa doesn't use this > on gen6+, but I also hate failing testcases. > > Signed-off-by: Daniel Vetter <[email protected]> > Reviewed-by: Ben Widawsky <[email protected]> > Signed-off-by: Keith Packard <[email protected]> > --- > drivers/gpu/drm/i915/i915_gem_tiling.c | 5 ++++- > 1 files changed, 4 insertions(+), 1 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c > b/drivers/gpu/drm/i915/i915_gem_tiling.c > index 99c4faa..103da6f 100644 > --- a/drivers/gpu/drm/i915/i915_gem_tiling.c > +++ b/drivers/gpu/drm/i915/i915_gem_tiling.c > @@ -92,7 +92,10 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev) > uint32_t swizzle_x = I915_BIT_6_SWIZZLE_UNKNOWN; > uint32_t swizzle_y = I915_BIT_6_SWIZZLE_UNKNOWN; > > - if (INTEL_INFO(dev)->gen >= 5) { > + if (INTEL_INFO(dev)->gen >= 6) { > + swizzle_x = I915_BIT_6_SWIZZLE_NONE; > + swizzle_y = I915_BIT_6_SWIZZLE_NONE; > + } else if (IS_GEN5(dev)) { > /* On Ironlake whatever DRAM config, GPU always do > * same swizzling setup. > */ > -- > 1.7.9.1 > -- Daniel Vetter Mail: [email protected] Mobile: +41 (0)79 365 57 48 _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
