On Tue, 11 Oct 2011 19:30:12 +0200, Daniel Vetter <daniel.vet...@ffwll.ch> wrote: > Based on a patch by Ben Widawsky, but with different colors > for the bikeshed. > > In contrast to Ben's patch this one doesn't add the fault regs. > Afaics they're for the optional page fault support which > - we're not enabling > - and which seems to be unsupported by the hw team. Recent bspec > lacks tons of information about this that the public docs released > half a year back still contain. > > Also dump ring HEAD/TAIL registers - I've recently seen a few > error_state where just guessing these is not good enough. > > v2: Also dump INSTPM for every ring. > > Signed-off-by: Daniel Vetter <daniel.vet...@ffwll.ch>
Close... > diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h > index 5f3ff9d..2abd6fd 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -149,16 +149,19 @@ struct drm_i915_error_state { > u32 eir; > u32 pgtbl_er; > u32 pipestat[I915_MAX_PIPES]; > + u32 tail[I915_MAX_PIPES]; > + u32 head[I915_MAX_PIPES]; itym I915_NUM_RINGS > u32 ipeir[I915_NUM_RINGS]; > u32 ipehr[I915_NUM_RINGS]; > u32 instdone[I915_NUM_RINGS]; > u32 acthd[I915_NUM_RINGS]; > u32 error; /* gen6+ */ > - u32 instpm; > - u32 instps; > + u32 instpm[I915_NUM_RINGS]; > + u32 instps[I915_NUM_RINGS]; > u32 instdone1; > u32 seqno[I915_NUM_RINGS]; > u64 bbaddr; > + u32 faddr[I915_NUM_RINGS]; > u64 fence[16]; > struct timeval time; > struct drm_i915_error_object { > diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c > index 79aba7f..aa70981 100644 > --- a/drivers/gpu/drm/i915/i915_irq.c > +++ b/drivers/gpu/drm/i915/i915_irq.c > @@ -878,12 +878,15 @@ static void i915_record_ring_state(struct drm_device > *dev, > { > struct drm_i915_private *dev_priv = dev->dev_private; > > + if (INTEL_INFO(dev)->gen >= 6) { > + error->faddr[ring->id] = > I915_READ(RING_DMA_FADD(ring->mmio_base)); > + } checkpatch hates you. Hates us all really. But we can keep it quiet here by not including the braces around the single line. -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx