Docs say that the secure batchbuffer field for > SNB B0 (products that actually shipped) should be 0 when not using PPGTT. I'd guess this has no positive or negative effect, but is just here to jive with the docs.
Cc: Daniel Vetter <daniel.vet...@ffwll.ch> Signed-off-by: Ben Widawsky <b...@bwidawsk.net> --- drivers/gpu/drm/i915/i915_dma.c | 5 ++++- drivers/gpu/drm/i915/intel_ringbuffer.c | 10 ++++++++-- 2 files changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index d76da38..1cb6d80 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c @@ -477,7 +477,10 @@ static int i915_dispatch_batchbuffer(struct drm_device * dev, if (ret) return ret; - if (INTEL_INFO(dev)->gen >= 4) { + if (INTEL_INFO(dev)->gen >= 6) { + OUT_RING(MI_BATCH_BUFFER_START); + OUT_RING(batch->start); + } else if (INTEL_INFO(dev)->gen >= 4) { OUT_RING(MI_BATCH_BUFFER_START | (2 << 6) | MI_BATCH_NON_SECURE_I965); OUT_RING(batch->start); } else { diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 0e99589..a08d16d 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c @@ -279,6 +279,9 @@ cleanup_pipe_control(struct intel_ring_buffer *ring) ring->private = NULL; } +static const struct intel_ring_buffer render_ring; +static const struct intel_ring_buffer gen6_bsd_ring; +static const struct intel_ring_buffer gen6_blt_ring; static int init_render_ring(struct intel_ring_buffer *ring) { struct drm_device *dev = ring->dev; @@ -783,7 +786,10 @@ render_ring_dispatch_execbuffer(struct intel_ring_buffer *ring, if (ret) return ret; - if (INTEL_INFO(dev)->gen >= 4) { + if (INTEL_INFO(dev)->gen >= 6) { + intel_ring_emit(ring, MI_BATCH_BUFFER_START); + intel_ring_emit(ring, offset); + } else if (INTEL_INFO(dev)->gen >= 4) { intel_ring_emit(ring, MI_BATCH_BUFFER_START | (2 << 6) | MI_BATCH_NON_SECURE_I965); @@ -1153,7 +1159,7 @@ gen6_ring_dispatch_execbuffer(struct intel_ring_buffer *ring, if (ret) return ret; - intel_ring_emit(ring, MI_BATCH_BUFFER_START | MI_BATCH_NON_SECURE_I965); + intel_ring_emit(ring, MI_BATCH_BUFFER_START); /* bit0-7 is the length on GEN6+ */ intel_ring_emit(ring, offset); intel_ring_advance(ring); -- 1.7.7 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx