V1: Just added per ring page faults
Reviewed-by: Daniel Vetter <daniel.vet...@ffwll.ch>
V2: Added much more per ring stuff
Signed-off-by: Ben Widawsky <b...@bwidawsk.net>
---
drivers/gpu/drm/i915/i915_debugfs.c | 44 +++++++++++++++----------
drivers/gpu/drm/i915/i915_drv.h | 28 ++++++----------
drivers/gpu/drm/i915/i915_irq.c | 60 ++++++++++++++++++++--------------
drivers/gpu/drm/i915/i915_reg.h | 14 +++++++-
4 files changed, 84 insertions(+), 62 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 8e95d66..332a418 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -747,34 +747,42 @@ static int i915_error_state(struct seq_file *m, void
*unused)
seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec,
error->time.tv_usec);
seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device);
- seq_printf(m, "EIR: 0x%08x\n", error->eir);
+ seq_printf(m, "EIR: 0x%08x\n", error->eir[RCS]);
seq_printf(m, "PGTBL_ER: 0x%08x\n", error->pgtbl_er);
if (INTEL_INFO(dev)->gen >= 6) {
+ seq_printf(m, "GFX Page Fault: 0x%08x\n",
error->page_fault[RCS]);
+ seq_printf(m, "Media Page Fault: 0x%08x\n",
error->page_fault[VCS]);
+ seq_printf(m, "Blitter Page Fault: 0x%08x\n",
error->page_fault[BCS]);
seq_printf(m, "ERROR: 0x%08x\n", error->error);
seq_printf(m, "Blitter command stream:\n");
- seq_printf(m, " ACTHD: 0x%08x\n", error->bcs_acthd);
- seq_printf(m, " IPEIR: 0x%08x\n", error->bcs_ipeir);
- seq_printf(m, " IPEHR: 0x%08x\n", error->bcs_ipehr);
- seq_printf(m, " INSTDONE: 0x%08x\n", error->bcs_instdone);
- seq_printf(m, " seqno: 0x%08x\n", error->bcs_seqno);
+ seq_printf(m, " ACTHD: 0x%08x\n", error->acthd[BCS]);
+ seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir[BCS]);
+ seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr[BCS]);
+ seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone[BCS]);
+ seq_printf(m, " FADDR: 0x%08x\n", error->fadd[BCS]);
+ seq_printf(m, " INSTPS: 0x%08x\n", error->instps[BCS]);
+ seq_printf(m, " seqno: 0x%08x\n", error->seqno[BCS]);
seq_printf(m, "Video (BSD) command stream:\n");
- seq_printf(m, " ACTHD: 0x%08x\n", error->vcs_acthd);
- seq_printf(m, " IPEIR: 0x%08x\n", error->vcs_ipeir);
- seq_printf(m, " IPEHR: 0x%08x\n", error->vcs_ipehr);
- seq_printf(m, " INSTDONE: 0x%08x\n", error->vcs_instdone);
- seq_printf(m, " seqno: 0x%08x\n", error->vcs_seqno);
+ seq_printf(m, " ACTHD: 0x%08x\n", error->acthd[VCS]);
+ seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir[VCS]);
+ seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr[VCS]);
+ seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone[VCS]);
+ seq_printf(m, " FADDR: 0x%08x\n", error->fadd[VCS]);
+ seq_printf(m, " INSTPS: 0x%08x\n", error->instps[VCS]);
+ seq_printf(m, " seqno: 0x%08x\n", error->seqno[VCS]);
}
seq_printf(m, "Render command stream:\n");
- seq_printf(m, " ACTHD: 0x%08x\n", error->acthd);
- seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir);
- seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr);
- seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone);
+ seq_printf(m, " ACTHD: 0x%08x\n", error->acthd[RCS]);
+ seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir[RCS]);
+ seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr[RCS]);
+ seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone[RCS]);
if (INTEL_INFO(dev)->gen >= 4) {
seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1);
- seq_printf(m, " INSTPS: 0x%08x\n", error->instps);
+ seq_printf(m, " INSTPS: 0x%08x\n", error->instps[RCS]);
}
- seq_printf(m, " INSTPM: 0x%08x\n", error->instpm);
- seq_printf(m, " seqno: 0x%08x\n", error->seqno);
+ seq_printf(m, " INSTPM: 0x%08x\n", error->instpm[RCS]);
+ seq_printf(m, " FADDR: 0x%08x\n", error->fadd[RCS]);
+ seq_printf(m, " seqno: 0x%08x\n", error->seqno[RCS]);
for (i = 0; i < dev_priv->num_fence_regs; i++)
seq_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 15c0ca5..567275c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -146,28 +146,20 @@ struct sdvo_device_mapping {
struct intel_display_error_state;
struct drm_i915_error_state {
- u32 eir;
+ u32 eir[I915_NUM_RINGS];
u32 pgtbl_er;
u32 pipestat[I915_MAX_PIPES];
- u32 ipeir;
- u32 ipehr;
- u32 instdone;
- u32 acthd;
+ u32 ipeir[I915_NUM_RINGS];
+ u32 ipehr[I915_NUM_RINGS];
+ u32 instdone[I915_NUM_RINGS];
+ u32 acthd[I915_NUM_RINGS];
+ u32 page_fault[I915_NUM_RINGS];
+ u32 fadd[I915_NUM_RINGS];
u32 error; /* gen6+ */
- u32 bcs_acthd; /* gen6+ blt engine */
- u32 bcs_ipehr;
- u32 bcs_ipeir;
- u32 bcs_instdone;
- u32 bcs_seqno;
- u32 vcs_acthd; /* gen6+ bsd engine */
- u32 vcs_ipehr;
- u32 vcs_ipeir;
- u32 vcs_instdone;
- u32 vcs_seqno;
- u32 instpm;
- u32 instps;
+ u32 instpm[I915_NUM_RINGS];
+ u32 instps[I915_NUM_RINGS];
u32 instdone1;
- u32 seqno;
+ u32 seqno[I915_NUM_RINGS];
u64 bbaddr;
u64 fence[16];
struct timeval time;
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 012732b..97e338b 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -906,45 +906,55 @@ static void i915_capture_error_state(struct drm_device
*dev)
DRM_INFO("capturing error event; look for more information in
/debug/dri/%d/i915_error_state\n",
dev->primary->index);
- error->seqno = dev_priv->ring[RCS].get_seqno(&dev_priv->ring[RCS]);
- error->eir = I915_READ(EIR);
+ error->seqno[RCS] = dev_priv->ring[RCS].get_seqno(&dev_priv->ring[RCS]);
+ error->eir[RCS] = I915_READ(EIR);
error->pgtbl_er = I915_READ(PGTBL_ER);
for_each_pipe(pipe)
error->pipestat[pipe] = I915_READ(PIPESTAT(pipe));
- error->instpm = I915_READ(INSTPM);
+ error->instpm[RCS] = I915_READ(INSTPM);
error->error = 0;
if (INTEL_INFO(dev)->gen >= 6) {
error->error = I915_READ(ERROR_GEN6);
-
- error->bcs_acthd = I915_READ(BCS_ACTHD);
- error->bcs_ipehr = I915_READ(BCS_IPEHR);
- error->bcs_ipeir = I915_READ(BCS_IPEIR);
- error->bcs_instdone = I915_READ(BCS_INSTDONE);
- error->bcs_seqno = 0;
+ error->page_fault[RCS] = I915_READ(GEN6_FAULT);
+ error->fadd[RCS] = I915_READ(GEN6_DMA_FADD);
+
+ error->eir[BCS] = I915_READ(GEN6_BLITTER_EIR);
+ error->acthd[BCS] = I915_READ(BCS_ACTHD);
+ error->ipehr[BCS] = I915_READ(BCS_IPEHR);
+ error->ipeir[BCS] = I915_READ(BCS_IPEIR);
+ error->fadd[BCS] = I915_READ(GEN6_BCS_FADD);
+ error->instdone[BCS] = I915_READ(BCS_INSTDONE);
+ error->instps[BCS] = I915_READ(GEN6_BCS_INSTPS);
+ error->seqno[BCS] = 0;
if (dev_priv->ring[BCS].get_seqno)
- error->bcs_seqno =
dev_priv->ring[BCS].get_seqno(&dev_priv->ring[BCS]);
-
- error->vcs_acthd = I915_READ(VCS_ACTHD);
- error->vcs_ipehr = I915_READ(VCS_IPEHR);
- error->vcs_ipeir = I915_READ(VCS_IPEIR);
- error->vcs_instdone = I915_READ(VCS_INSTDONE);
- error->vcs_seqno = 0;
+ error->seqno[BCS] =
dev_priv->ring[BCS].get_seqno(&dev_priv->ring[BCS]);
+ error->page_fault[BCS] = I915_READ(GEN6_BLT_FAULT);
+
+ error->eir[VCS] = I915_READ(GEN6_BSD_EIR);
+ error->acthd[VCS] = I915_READ(VCS_ACTHD);
+ error->ipehr[VCS] = I915_READ(VCS_IPEHR);
+ error->ipeir[VCS] = I915_READ(VCS_IPEIR);
+ error->fadd[VCS] = I915_READ(GEN6_VCS_FADD);
+ error->instdone[VCS] = I915_READ(VCS_INSTDONE);
+ error->instps[VCS] = I915_READ(GEN6_VCS_INSTPS);
+ error->seqno[VCS] = 0;
if (dev_priv->ring[VCS].get_seqno)
- error->vcs_seqno =
dev_priv->ring[VCS].get_seqno(&dev_priv->ring[VCS]);
+ error->seqno[VCS] =
dev_priv->ring[VCS].get_seqno(&dev_priv->ring[VCS]);
+ error->page_fault[VCS] = I915_READ(GEN6_BSD_FAULT);
}
if (INTEL_INFO(dev)->gen >= 4) {
- error->ipeir = I915_READ(IPEIR_I965);
- error->ipehr = I915_READ(IPEHR_I965);
- error->instdone = I915_READ(INSTDONE_I965);
- error->instps = I915_READ(INSTPS);
+ error->ipeir[RCS] = I915_READ(IPEIR_I965);
+ error->ipehr[RCS] = I915_READ(IPEHR_I965);
+ error->instdone[RCS] = I915_READ(INSTDONE_I965);
+ error->instps[RCS] = I915_READ(INSTPS);
error->instdone1 = I915_READ(INSTDONE1);
error->acthd = I915_READ(ACTHD_I965);
error->bbaddr = I915_READ64(BB_ADDR);
} else {
- error->ipeir = I915_READ(IPEIR);
- error->ipehr = I915_READ(IPEHR);
- error->instdone = I915_READ(INSTDONE);
- error->acthd = I915_READ(ACTHD);
+ error->ipeir[RCS] = I915_READ(IPEIR);
+ error->ipehr[RCS] = I915_READ(IPEHR);
+ error->instdone[RCS] = I915_READ(INSTDONE);
+ error->acthd[RCS] = I915_READ(ACTHD);
error->bbaddr = 0;
}
i915_gem_record_fences(dev, error);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 138eae1..ca28efc 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -347,6 +347,7 @@
#define IPEHR_I965 0x02068
#define INSTDONE_I965 0x0206c
#define INSTPS 0x02070 /* 965+ only */
+#define GEN6_DMA_FADD 0x02078
#define INSTDONE1 0x0207c /* 965+ only */
#define ACTHD_I965 0x02074
#define HWS_PGA 0x02080
@@ -362,12 +363,21 @@
#define VCS_INSTDONE 0x1206C
#define VCS_IPEIR 0x12064
#define VCS_IPEHR 0x12068
+#define GEN6_VCS_INSTPS 0x12070 /* Not clear if this is valid */
#define VCS_ACTHD 0x12074
+#define GEN6_VCS_FADD 0x12078
+#define GEN6_VCS_INSTDONE 0x12090
#define BCS_INSTDONE 0x2206C
#define BCS_IPEIR 0x22064
#define BCS_IPEHR 0x22068
+#define GEN6_BCS_INSTPS 0x22070
#define BCS_ACTHD 0x22074
+#define GEN6_BCS_FADD 0x22078
+#define GEN6_BCS_INSTDONE 0x22090
+#define GEN6_FAULT 0x04094
+#define GEN6_BSD_FAULT 0x04194
+#define GEN6_BLT_FAULT 0x04294
#define ERROR_GEN6 0x040a0
/* GM45+ chicken bits -- debug workaround bits that may be required
@@ -545,6 +555,8 @@
#define GEN6_BLITTER_COMMAND_PARSER_MASTER_ERROR (1 << 25)
#define GEN6_BLITTER_SYNC_STATUS (1 << 24)
#define GEN6_BLITTER_USER_INTERRUPT (1 << 22)
+#define GEN6_BLITTER_EIR 0x220b0
+#define GEN6_BLITTER_EMR 0x220b4
#define GEN6_BLITTER_ECOSKPD 0x221d0
#define GEN6_BLITTER_LOCK_SHIFT 16
@@ -559,7 +571,7 @@
#define GEN6_BSD_HWSTAM 0x12098
#define GEN6_BSD_IMR 0x120a8
#define GEN6_BSD_USER_INTERRUPT (1 << 12)
-
+#define GEN6_BSD_EIR 0x120b0
#define GEN6_BSD_RNCID 0x12198
/*
--
1.7.6.4
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx
