From: David Woodhouse <dw...@infradead.org>
To work around a hardware issue, we have to submit IOTLB flushes while
the graphics engine is idle. The graphics driver will go to great
lengths to ensure that it gets that right on the affected chipset(s)...
so let's not screw it over by deferring the unmap and doing it later.
That wouldn't be very helpful.
Signed-off-by: David Woodhouse <david.woodho...@intel.com>
Signed-off-by: Ben Widawsky <b...@bwidawsk.net>
---
drivers/iommu/intel-iommu.c | 6 +++++-
1 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
index c621c98..dcdc3c7 100644
--- a/drivers/iommu/intel-iommu.c
+++ b/drivers/iommu/intel-iommu.c
@@ -3950,7 +3950,11 @@ static void __devinit
quirk_calpella_no_shadow_gtt(struct pci_dev *dev)
if (!(ggc & GGC_MEMORY_VT_ENABLED)) {
printk(KERN_INFO "DMAR: BIOS has allocated no shadow GTT;
disabling IOMMU for graphics\n");
dmar_map_gfx = 0;
- }
+ } else {
+ /* we have to ensure the gfx device is idle before we flush */
+ printk(KERN_INFO "DMAR: Disabling batched IOTLB flush on
Ironlake\n");
+ intel_iommu_strict = 1;
+ }
}
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0040,
quirk_calpella_no_shadow_gtt);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0044,
quirk_calpella_no_shadow_gtt);
--
1.7.6.4
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