On Fri, 23 Sep 2011 08:13:15 +0530, Jesse Barnes <jbar...@virtuousgeek.org> wrote:
> I think it depends on the platform. On some, enabling SSC may actually > create more noise than not for some components (not that I've run the > EMF calculations...). So, why is the MBA EFI code enabling SSC while the VBT table says not to use it? It's all mysterious to me. > I don't have this code in my tree though... is this the patch I sent > awhile back? I thought it broke external outputs too? The last time > we touched this we broke the dual head case (a config change caused one > head to go blank), did you test that? You sent two pieces, I think; the second one tried to turn unused clocks off and that broke stuff. Which is understandable given that it was only looking at one CRTC when doing the global configuration. > What I don't understand about the refclk code is that we should be able > to leave everything enabled and just select the right clock source in > the DPLL_SEL bits. But that doesn't seem to help the wavy VGA bug, > since in that case I think we're explicitly choosing the non-SSC clock > and we still get waviness. We don't have any hardware anywhere which exhibits this problem, do we? Getting hold of some would let us poke at it. > I *think* the code you changed is ok; just needs lots of testing and > verification that the SSC bits are set like we expect as we change > configurations. I like the "has_panel" cleanup too; previous versions > of this code had is_lvds || is_edp && pch_edp etc sprinkled all over. Yeah, it's longer, but I think it's more readable now. My big concern is that we're guessing which pipes will use SSC in this function and then computing which pipes actually use SSC separately. I think we should figure out which pipes want to use SSC and then go set the refclks. as needed. -- keith.pack...@intel.com
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