Signed-off-by: Ben Widawsky <b...@bwidawsk.net> --- intel/intel_bufmgr_gem.c | 49 +++++++++++++++++++++++++++++++++++++++------ 1 files changed, 42 insertions(+), 7 deletions(-)
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c index 4f4de92..7431ed9 100644 --- a/intel/intel_bufmgr_gem.c +++ b/intel/intel_bufmgr_gem.c @@ -195,6 +195,11 @@ struct _drm_intel_bo_gem { * relocations. */ int reloc_tree_fences; + + /** + * CPU write only buffer. + */ + char cpu_mapping; }; static unsigned int @@ -998,15 +1003,12 @@ static void drm_intel_gem_bo_unreference(drm_intel_bo *bo) } } -static int drm_intel_gem_bo_map(drm_intel_bo *bo, int write_enable) +static int do_gem_bo_map(drm_intel_bo *bo, int write_enable) { drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; - struct drm_i915_gem_set_domain set_domain; int ret; - pthread_mutex_lock(&bufmgr_gem->lock); - /* Allow recursive mapping. Mesa may recursively map buffers with * nested display loops. */ @@ -1018,6 +1020,8 @@ static int drm_intel_gem_bo_map(drm_intel_bo *bo, int write_enable) memset(&mmap_arg, 0, sizeof(mmap_arg)); mmap_arg.handle = bo_gem->gem_handle; mmap_arg.offset = 0; + if (write_enable == 27) + mmap_arg.offset |= 1 ; mmap_arg.size = bo->size; ret = drmIoctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_MMAP, @@ -1027,7 +1031,6 @@ static int drm_intel_gem_bo_map(drm_intel_bo *bo, int write_enable) DBG("%s:%d: Error mapping buffer %d (%s): %s .\n", __FILE__, __LINE__, bo_gem->gem_handle, bo_gem->name, strerror(errno)); - pthread_mutex_unlock(&bufmgr_gem->lock); return ret; } bo_gem->mem_virtual = (void *)(uintptr_t) mmap_arg.addr_ptr; @@ -1036,6 +1039,39 @@ static int drm_intel_gem_bo_map(drm_intel_bo *bo, int write_enable) bo_gem->mem_virtual); bo->virtual = bo_gem->mem_virtual; + return 0; +} + +static int drm_intel_gem_bo_map_wo(drm_intel_bo *bo) +{ + drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; + drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; + int wo_mapping_change; + int ret; + + wo_mapping_change = ((bo_gem->cpu_mapping) != 0); + assert(!bo_gem->mem_virtual || !wo_mapping_change); + + pthread_mutex_lock(&bufmgr_gem->lock); + ret = do_gem_bo_map(bo, 27); + if (ret == 0) + bo_gem->cpu_mapping = 1; + pthread_mutex_unlock(&bufmgr_gem->lock); + return ret; +} + +static int drm_intel_gem_bo_map(drm_intel_bo *bo, int write_enable) +{ + drm_intel_bufmgr_gem *bufmgr_gem = (drm_intel_bufmgr_gem *) bo->bufmgr; + drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *) bo; + struct drm_i915_gem_set_domain set_domain; + int ret; + + if (write_enable == 27) + return drm_intel_gem_bo_map_wo(bo); + + pthread_mutex_lock(&bufmgr_gem->lock); + ret = do_gem_bo_map(bo, write_enable); set_domain.handle = bo_gem->gem_handle; set_domain.read_domains = I915_GEM_DOMAIN_CPU; if (write_enable) @@ -1052,8 +1088,7 @@ static int drm_intel_gem_bo_map(drm_intel_bo *bo, int write_enable) } pthread_mutex_unlock(&bufmgr_gem->lock); - - return 0; + return ret; } int drm_intel_gem_bo_map_gtt(drm_intel_bo *bo) -- 1.7.6 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx