Upload the system routine as part of the invariant state if debugging. Remove SIP setting if not debugging to make it more friendly for others that may be debugging shaders or media kernels.
Signed-off-by: Ben Widawsky <b...@bwidawsk.net> --- src/mesa/drivers/dri/i965/brw_misc_state.c | 13 +++++++++---- 1 files changed, 9 insertions(+), 4 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_misc_state.c b/src/mesa/drivers/dri/i965/brw_misc_state.c index bc8ef78..139c190 100644 --- a/src/mesa/drivers/dri/i965/brw_misc_state.c +++ b/src/mesa/drivers/dri/i965/brw_misc_state.c @@ -652,10 +652,15 @@ static void upload_invarient_state( struct brw_context *brw ) } } - BEGIN_BATCH(2); - OUT_BATCH(CMD_STATE_SIP << 16 | (2 - 2)); - OUT_BATCH(0); - ADVANCE_BATCH(); + /* The system routine must be set after a change to Instruction base */ + if (brw->wm.debugging) { + assert(brw->wm.sip_offset != 0); + /* assert instruction base == 0 */ + BEGIN_BATCH(2); + OUT_BATCH(CMD_STATE_SIP << 16 | (2 - 2)); + OUT_BATCH(brw->wm.sip_offset); + ADVANCE_BATCH(); + } BEGIN_BATCH(1); OUT_BATCH(brw->CMD_VF_STATISTICS << 16 | -- 1.7.6 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx