---
src/mesa/drivers/dri/intel/intel_batchbuffer.c | 2 +-
src/mesa/drivers/dri/intel/intel_chipset.h | 3 --
src/mesa/drivers/dri/intel/intel_decode.c | 42 ++++++++++++------------
src/mesa/drivers/dri/intel/intel_decode.h | 2 +-
4 files changed, 23 insertions(+), 26 deletions(-)
diff --git a/src/mesa/drivers/dri/intel/intel_batchbuffer.c
b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
index 377989b..9e7198f 100644
--- a/src/mesa/drivers/dri/intel/intel_batchbuffer.c
+++ b/src/mesa/drivers/dri/intel/intel_batchbuffer.c
@@ -109,7 +109,7 @@ do_flush_locked(struct intel_context *intel)
if (unlikely(INTEL_DEBUG & DEBUG_BATCH)) {
intel_decode(batch->map, batch->used,
batch->bo->offset,
- intel->intelScreen->deviceID, GL_TRUE);
+ intel->gen, GL_TRUE);
if (intel->vtbl.debug_batch != NULL)
intel->vtbl.debug_batch(intel);
diff --git a/src/mesa/drivers/dri/intel/intel_chipset.h
b/src/mesa/drivers/dri/intel/intel_chipset.h
index ca5c295..2e4b11e 100644
--- a/src/mesa/drivers/dri/intel/intel_chipset.h
+++ b/src/mesa/drivers/dri/intel/intel_chipset.h
@@ -128,9 +128,6 @@
devid == PCI_CHIP_I946_GZ || \
IS_G4X(devid))
-/* Compat macro for intel_decode.c */
-#define IS_IRONLAKE(devid) IS_GEN5(devid)
-
#define IS_SNB_GT1(devid) (devid == PCI_CHIP_SANDYBRIDGE_GT1 || \
devid == PCI_CHIP_SANDYBRIDGE_M_GT1 || \
devid == PCI_CHIP_SANDYBRIDGE_S)
diff --git a/src/mesa/drivers/dri/intel/intel_decode.c
b/src/mesa/drivers/dri/intel/intel_decode.c
index 688b8fe..5400823 100644
--- a/src/mesa/drivers/dri/intel/intel_decode.c
+++ b/src/mesa/drivers/dri/intel/intel_decode.c
@@ -789,7 +789,7 @@ i915_decode_instruction(uint32_t *data, uint32_t hw_offset,
static int
decode_3d_1d(uint32_t *data, int count,
uint32_t hw_offset,
- uint32_t devid,
+ uint32_t gen,
int *failures)
{
unsigned int len, i, c, idx, word, map, sampler, instr;
@@ -889,7 +889,7 @@ decode_3d_1d(uint32_t *data, int count,
BUFFER_FAIL(count, len, "3DSTATE_LOAD_STATE_IMMEDIATE_1");
/* save vertex state for decode */
- if (IS_9XX(devid)) {
+ if (gen >= 3) {
if (word == 2) {
saved_s2_set = 1;
saved_s2 = data[i];
@@ -1021,7 +1021,7 @@ decode_3d_1d(uint32_t *data, int count,
}
return len;
case 0x01:
- if (!IS_9XX(devid))
+ if (gen < 3)
break;
instr_out(data, hw_offset, 0, "3DSTATE_SAMPLER_STATE\n");
instr_out(data, hw_offset, 1, "mask\n");
@@ -1107,7 +1107,7 @@ decode_3d_1d(uint32_t *data, int count,
for (idx = 0; idx < ARRAY_SIZE(opcodes_3d_1d); idx++)
{
opcode_3d_1d = &opcodes_3d_1d[idx];
- if (opcode_3d_1d->i830_only && IS_9XX(devid))
+ if (opcode_3d_1d->i830_only && gen >= 3)
continue;
if (((data[0] & 0x00ff0000) >> 16) == opcode_3d_1d->opcode) {
@@ -1340,7 +1340,7 @@ out:
}
static int
-decode_3d(uint32_t *data, int count, uint32_t hw_offset, uint32_t devid, int
*failures)
+decode_3d(uint32_t *data, int count, uint32_t hw_offset, uint32_t gen, int
*failures)
{
uint32_t opcode;
unsigned int idx;
@@ -1368,7 +1368,7 @@ decode_3d(uint32_t *data, int count, uint32_t hw_offset,
uint32_t devid, int *fa
case 0x1f:
return decode_3d_primitive(data, count, hw_offset, failures);
case 0x1d:
- return decode_3d_1d(data, count, hw_offset, devid, failures);
+ return decode_3d_1d(data, count, hw_offset, gen, failures);
case 0x1c:
return decode_3d_1c(data, count, hw_offset, failures);
}
@@ -1563,7 +1563,7 @@ state_max_out(uint32_t *data, uint32_t hw_offset,
unsigned int index,
}
static int
-decode_3d_965(uint32_t *data, int count, uint32_t hw_offset, uint32_t devid,
int *failures)
+decode_3d_965(uint32_t *data, int count, uint32_t hw_offset, uint32_t gen, int
*failures)
{
uint32_t opcode;
unsigned int idx, len;
@@ -1641,9 +1641,9 @@ decode_3d_965(uint32_t *data, int count, uint32_t
hw_offset, uint32_t devid, int
data[1] & ~0x3f, ((data[1] & 0x3f) + 1) * 64);
return len;
case 0x6101:
- if (IS_GEN6(devid))
+ if (gen == 6)
sba_len = 10;
- else if (IS_IRONLAKE(devid))
+ else if (gen == 5)
sba_len = 8;
else
sba_len = 6;
@@ -1659,17 +1659,17 @@ decode_3d_965(uint32_t *data, int count, uint32_t
hw_offset, uint32_t devid, int
state_base_out(data, hw_offset, i++, "general");
state_base_out(data, hw_offset, i++, "surface");
- if (IS_GEN6(devid))
+ if (gen == 6)
state_base_out(data, hw_offset, i++, "dynamic");
state_base_out(data, hw_offset, i++, "indirect");
- if (IS_IRONLAKE(devid) || IS_GEN6(devid))
+ if (gen == 5 || gen == 6)
state_base_out(data, hw_offset, i++, "instruction");
state_max_out(data, hw_offset, i++, "general");
- if (IS_GEN6(devid))
+ if (gen == 6)
state_max_out(data, hw_offset, i++, "dynamic");
state_max_out(data, hw_offset, i++, "indirect");
- if (IS_IRONLAKE(devid) || IS_GEN6(devid))
+ if (gen == 5 || gen == 6)
state_max_out(data, hw_offset, i++, "instruction");
return len;
@@ -1909,7 +1909,7 @@ decode_3d_965(uint32_t *data, int count, uint32_t
hw_offset, uint32_t devid, int
}
static int
-decode_3d_i830(uint32_t *data, int count, uint32_t hw_offset, uint32_t devid,
int *failures)
+decode_3d_i830(uint32_t *data, int count, uint32_t hw_offset, uint32_t gen,
int *failures)
{
unsigned int idx;
uint32_t opcode;
@@ -1944,7 +1944,7 @@ decode_3d_i830(uint32_t *data, int count, uint32_t
hw_offset, uint32_t devid, in
case 0x1f:
return decode_3d_primitive(data, count, hw_offset, failures);
case 0x1d:
- return decode_3d_1d(data, count, hw_offset, devid, failures);
+ return decode_3d_1d(data, count, hw_offset, gen, failures);
case 0x1c:
return decode_3d_1c(data, count, hw_offset, failures);
}
@@ -1988,7 +1988,7 @@ decode_3d_i830(uint32_t *data, int count, uint32_t
hw_offset, uint32_t devid, in
int
intel_decode(uint32_t *data, int count,
uint32_t hw_offset,
- uint32_t devid,
+ uint32_t gen,
uint32_t ignore_end_of_batchbuffer)
{
int ret;
@@ -2023,18 +2023,18 @@ intel_decode(uint32_t *data, int count,
hw_offset + index * 4, &failures);
break;
case 0x3:
- if (IS_965(devid)) {
+ if (gen >= 4) {
index += decode_3d_965(data + index, count - index,
hw_offset + index * 4,
- devid, &failures);
- } else if (IS_9XX(devid)) {
+ gen, &failures);
+ } else if (gen >= 3) {
index += decode_3d(data + index, count - index,
hw_offset + index * 4,
- devid, &failures);
+ gen, &failures);
} else {
index += decode_3d_i830(data + index, count - index,
hw_offset + index * 4,
- devid, &failures);
+ gen, &failures);
}
break;
default:
diff --git a/src/mesa/drivers/dri/intel/intel_decode.h
b/src/mesa/drivers/dri/intel/intel_decode.h
index a13b075..a11bcff 100644
--- a/src/mesa/drivers/dri/intel/intel_decode.h
+++ b/src/mesa/drivers/dri/intel/intel_decode.h
@@ -25,7 +25,7 @@
*
*/
-int intel_decode(uint32_t *data, int count, uint32_t hw_offset, uint32_t devid,
+int intel_decode(uint32_t *data, int count, uint32_t hw_offset, uint32_t gen,
uint32_t ignore_end_of_batchbuffer);
void intel_decode_context_set_head_tail(uint32_t head, uint32_t tail);
void intel_decode_context_reset(void);
--
1.7.4.4
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