Whenever we finish reading an object through a fence, for safety we clear any GPU read domain and so invalidate any TLBs associated with the fenced region upon its next use. As we now always flush writes through an existing fence before it is released and then trigger the invalidation of the GPU domains should we ever re-use it again on the GPU, we no longer need to compare and force the invalidation if the fenced access changes in move_to_gpu().
Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> Reviewed-by: Daniel Vetter <daniel.vet...@ffwll.ch> --- drivers/gpu/drm/i915/i915_gem.c | 2 ++ drivers/gpu/drm/i915/i915_gem_execbuffer.c | 5 ++--- 2 files changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 6b6bde0..0ccd3ab 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c @@ -2536,6 +2536,8 @@ i915_gem_object_flush_fence(struct drm_i915_gem_object *obj, return ret; } + /* Invalidate the GPU TLBs for any future reads */ + obj->base.read_domains &= ~I915_GEM_GPU_DOMAINS; obj->fenced_gpu_access = false; } diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c index a07911f..0010aee 100644 --- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c +++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c @@ -172,9 +172,8 @@ i915_gem_object_set_to_gpu_domain(struct drm_i915_gem_object *obj, * write domain */ if (obj->base.write_domain && - (((obj->base.write_domain != obj->base.pending_read_domains || - obj->ring != ring)) || - (obj->fenced_gpu_access && !obj->pending_fenced_gpu_access))) { + (obj->base.write_domain != obj->base.pending_read_domains || + obj->ring != ring)) { flush_domains |= obj->base.write_domain; invalidate_domains |= obj->base.pending_read_domains & ~obj->base.write_domain; -- 1.7.4.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx