On Thu, 24 Mar 2011 19:55:59 +0000 Chris Wilson <ch...@chris-wilson.co.uk> wrote:
> During modesetting, we need to wait for the hardware to report > readiness by polling the registers. Normally, we call msleep() between > reads, because some state changes may take a whole vblank or more > to complete. However during a panic, we are in an atomic context and > cannot sleep. Instead, busy spin polling the termination condition. > > References: https://bugzilla.kernel.org/show_bug.cgi?id=31772 > Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk> > --- > drivers/gpu/drm/i915/intel_drv.h | 2 +- > 1 files changed, 1 insertions(+), 1 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_drv.h > b/drivers/gpu/drm/i915/intel_drv.h > index 5daa991..ac70398 100644 > --- a/drivers/gpu/drm/i915/intel_drv.h > +++ b/drivers/gpu/drm/i915/intel_drv.h > @@ -39,7 +39,7 @@ > ret__ = -ETIMEDOUT; \ > break; \ > } \ > - if (W && !in_dbg_master()) msleep(W); \ > + if (W && !(in_dbg_master() || in_atomic())) msleep(W); \ > } \ > ret__; \ > }) Yeah, this should be fine; though I think in_dbg_master always implies in_atomic too, so you could just collapse the check. Jason, can you confirm that? -- Jesse Barnes, Intel Open Source Technology Center _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
