On Tue, 21 Dec 2010 12:12:42 -0800, Keith Packard <kei...@keithp.com> wrote: > On Tue, 21 Dec 2010 19:55:15 +0000, Chris Wilson <ch...@chris-wilson.co.uk> > wrote: > > > The test we do is simply whether the LVDS i2c pins are addressable. That > > requires differentiating between an IO error and a NAK, which at present > > is only possible using GMBUS. The reference to this method I found in the > > BIOS writers' guide, but of course that doesn't actually explain how it > > works (especially the significance of address 0xa0). > > I can't see how that would work without an i2c receiver on the DDC > bus... > > But, then, I've been surprised by DDC in the past, so perhaps it's worth > a test on a device that has LVDS but does not have EDID.
It works as far back as I can test, a 915GM without a VBIOS or EDID. I've had one person report that it can distinguish a phantom LVDS panel on one g33 based all-in-one computer. Though not all hardware is equal, and prudence suggests wider testing. ;-) -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
