On Tue, 14 Dec 2010 13:02:50 +0800, Zhenyu Wang <zhen...@linux.intel.com> wrote: > On 2010.12.14 11:03:53 +0800, Zhenyu Wang wrote: > > > > Looks from a6963596a13e62f8e65b1cf3403a330ff2db407c, setting > > GTT entry on i965-ish totally ignored cached memory flag? > > That might break r/w consistent for pages like hw status. > > > > This should recover that.
Nice catch. My fault, I should have spotted that when I applied the patch. Thanks! -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
