[Intel-gfx] [PATCH 1/5] drm/i915: add panel reset workaround

[Jesse Barnes]

Ironlake requires that we clear the reset panel bit during power
sequences and restore it afterwards.  Uncondtionally add code to do that
since it should be harmless on SNB+.

Signed-off-by: Jesse Barnes <jbar...@virtuousgeek.org>
---
 drivers/gpu/drm/i915/intel_dp.c |   17 ++++++++++++++++-
 1 files changed, 16 insertions(+), 1 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 5dde80f..048e6a0 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -728,6 +728,12 @@ static void ironlake_edp_panel_on (struct drm_device *dev)
                return;
 
        pp = I915_READ(PCH_PP_CONTROL);
+
+       /* ILK workaround: disable reset around power sequence */
+       pp &= ~PANEL_POWER_RESET;
+       I915_WRITE(PCH_PP_CONTROL, pp);
+       POSTING_READ(PCH_PP_CONTROL);
+
        pp |= PANEL_UNLOCK_REGS | POWER_TARGET_ON;
        I915_WRITE(PCH_PP_CONTROL, pp);
        do {
@@ -738,7 +744,9 @@ static void ironlake_edp_panel_on (struct drm_device *dev)
                DRM_DEBUG_KMS("panel on wait timed out: 0x%08x\n", pp_status);
 
        pp &= ~(PANEL_UNLOCK_REGS | EDP_FORCE_VDD);
+       pp |= PANEL_POWER_RESET; /* restore panel reset bit */
        I915_WRITE(PCH_PP_CONTROL, pp);
+       POSTING_READ(PCH_PP_CONTROL);
 }
 
 static void ironlake_edp_panel_off (struct drm_device *dev)
@@ -748,6 +756,12 @@ static void ironlake_edp_panel_off (struct drm_device *dev)
        u32 pp, pp_status;
 
        pp = I915_READ(PCH_PP_CONTROL);
+
+       /* ILK workaround: disable reset around power sequence */
+       pp &= ~PANEL_POWER_RESET;
+       I915_WRITE(PCH_PP_CONTROL, pp);
+       POSTING_READ(PCH_PP_CONTROL);
+
        pp &= ~POWER_TARGET_ON;
        I915_WRITE(PCH_PP_CONTROL, pp);
        do {
@@ -758,8 +772,9 @@ static void ironlake_edp_panel_off (struct drm_device *dev)
                DRM_DEBUG_KMS("panel off wait timed out\n");
 
        /* Make sure VDD is enabled so DP AUX will work */
-       pp |= EDP_FORCE_VDD;
+       pp |= EDP_FORCE_VDD | PANEL_POWER_RESET; /* restore panel reset bit */
        I915_WRITE(PCH_PP_CONTROL, pp);
+       POSTING_READ(PCH_PP_CONTROL);
 }
 
 static void ironlake_edp_backlight_on (struct drm_device *dev)
-- 
1.7.0.4

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