From: Zhenyu Wang <zhen...@linux.intel.com>
The sync flush enable mask on 845G and 830M is flipped.
So driver should invert it usage.
Signed-off-by: Zhenyu Wang <zhen...@linux.intel.com>
Reviewed-by: Chris Wilson <ch...@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_dma.c | 10 ++++++++--
1 files changed, 8 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index f19ffe8..4b6c2f8 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1356,6 +1356,7 @@ static int i915_load_modeset_init(struct drm_device *dev,
{
struct drm_i915_private *dev_priv = dev->dev_private;
int fb_bar = IS_I9XX(dev) ? 2 : 0;
+ u32 instpm_val;
int ret = 0;
dev->mode_config.fb_base = pci_resource_start(dev->pdev, fb_bar) &
@@ -1432,9 +1433,14 @@ static int i915_load_modeset_init(struct drm_device *dev,
/*
* Initialize the hardware status page IRQ location.
+ * errata: on 845G and 830M, bit 21's polarity is reversed,
+ * so the usage is inverted.
*/
-
- I915_WRITE(INSTPM, (1 << 5) | (1 << 21));
+ if (IS_845G(dev) || IS_I830(dev))
+ instpm_val = (1 << 5) | (0 << 21);
+ else
+ instpm_val = (1 << 5) | (1 << 21);
+ I915_WRITE(INSTPM, instpm_val);
ret = intel_fbdev_init(dev);
if (ret)
--
1.7.1
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