Fix some intel_ring_begin size parameter.
Signed-off-by: Zou Nan hai <nanhai....@intel.com>
---
drivers/gpu/drm/i915/intel_ringbuffer.c | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c
b/drivers/gpu/drm/i915/intel_ringbuffer.c
index cea4f1a..9421d1c 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -406,7 +406,7 @@ bsd_ring_add_request(struct drm_device *dev,
{
u32 seqno;
seqno = intel_ring_get_seqno(dev, ring);
- intel_ring_begin(dev, ring, 4);
+ intel_ring_begin(dev, ring, 16);
intel_ring_emit(dev, ring, MI_STORE_DWORD_INDEX);
intel_ring_emit(dev, ring,
I915_GEM_HWS_INDEX << MI_STORE_DWORD_INDEX_SHIFT);
@@ -456,7 +456,7 @@ bsd_ring_dispatch_gem_execbuffer(struct drm_device *dev,
{
uint32_t exec_start;
exec_start = (uint32_t) exec_offset + exec->batch_start_offset;
- intel_ring_begin(dev, ring, 2);
+ intel_ring_begin(dev, ring, 8);
intel_ring_emit(dev, ring, MI_BATCH_BUFFER_START |
(2 << 6) | MI_BATCH_NON_SECURE_I965);
intel_ring_emit(dev, ring, exec_start);
@@ -492,14 +492,14 @@ render_ring_dispatch_gem_execbuffer(struct drm_device
*dev,
}
if (IS_I830(dev) || IS_845G(dev)) {
- intel_ring_begin(dev, ring, 4);
+ intel_ring_begin(dev, ring, 16);
intel_ring_emit(dev, ring, MI_BATCH_BUFFER);
intel_ring_emit(dev, ring,
exec_start | MI_BATCH_NON_SECURE);
intel_ring_emit(dev, ring, exec_start + exec_len - 4);
intel_ring_emit(dev, ring, 0);
} else {
- intel_ring_begin(dev, ring, 4);
+ intel_ring_begin(dev, ring, 16);
if (IS_I965G(dev)) {
intel_ring_emit(dev, ring,
MI_BATCH_BUFFER_START | (2 << 6)
--
1.7.1
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