Why are you asking?
It is simple: clock remains the same for any subcapacity. Simply some
cycles are taken by "dummy LPAR".
How does it relate to CPI? It does not affect...
--
Radoslaw Skorupka
Lodz, Poland
W dniu 2019-03-04 o 14:51, Martin Packer pisze:
Would you expect Cycles-Per-Instruction (CPI) in SMF 113 to be larger for
a subcapacity machine?
Cheers, Martin
Martin Packer
zChampion, Systems Investigator & Performance Troubleshooter, IBM
+44-7802-245-584
email: martin_pac...@uk.ibm.com
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From: "R.S." <r.skoru...@bremultibank.com.pl>
To: IBM-MAIN@LISTSERV.UA.EDU
Date: 04/03/2019 13:39
Subject: Re: CPU time and zIIP
Sent by: IBM Mainframe Discussion List <IBM-MAIN@LISTSERV.UA.EDU>
W dniu 2019-03-03 o 17:07, Christopher Y. Blaicher pisze:
ZIIP and ZAAP processors always run at full speed, even when running on
a sub-capacity box.
One thing, among many, I don't know is how IBM implements sub-capacity.
Slow the clock speed? Skip cycles?
All processors, including subcapacity CPs run at the same speed, which
is different for big box and small (BC) box.
How subcapacity CP makes the subcapacity? By stealing cycles, imagine
there's hidden LPAR with some fixed weigth.
Note, the processors are actually cores in PU, AFAIK there is no way the
cores would work at different speeds within the PU.
Note 2, the same method (stealing cycles, not slowing down the clock)
was in use for RAn machines in 9672 era.
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