W dniu 2018-12-18 o 13:03, Elardus Engelbrecht pisze:
Radoslaw Skorupka wrote:
Except ...it doesn't answer the question: HOW CPU RECOGNIZE ITS OWN FAILURE?
I don't have the original documents (Redbooks/Share presentations/KC/etc.) from
IBM, but in short this is what happens (from my failing/decaying memory):
Each CPU (on an IBM mainframe) consists of two halves. Both halves are
executing an instruction and the results are compared.
If there is a difference, then the instruction is retried. If still there is a
difference, somehow the CPU is giving the instruction and the rest of the cache
to another [unoccupied] CPU and then turns itself of and announce its own
status to the hardware.
Sorry for not having the full details, but this is what I remember ...
Oh, of course, If I am wrong or the process described above changed, please
correct me.
That's what I heard about, but I wanted to get some confirmation or even
written source.
Regards
--
Radoslaw Skorupka
Lodz, Poland
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