On 5/01/2018 5:53 PM, Cannaerts, Jan wrote:
And as you said, you need some control over what lives in the cache and what
does not. There are some z/Arch instructions to mark cached data as no longer
important, but the PoP specifically mentions that the CPU does not necessarily
remove the data from cache. You can trick the CPU in to filling the cache with
junk that you're using in a dummy process though.
The code in the example is still Intel specific. AMD is an "Intel clone", as far
as instruction set and behavior goes, but they differ on a microcode level.
x86 and z/Arch differ in many more ways.
Indeed. And there are Linux patches for AMD WRT RDSTC speculation
exploits
https://github.com/openSUSE/kernel/commit/6a334d96b8c8924357e2c692c305066f512ec1b8.
IBM remain tight lipped about z/OS exploits but are releasing patches
for POWER which shares a similar DNA to Z, so I wonder if there are
vulnerabilities.
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