Sounds good to me EXCEPT for the "key 0, supervisor state" requirement.

Sounds like we also need a system-supplied PC service that can be invoked from 
normal non-supervisor-state, non-zero-key application code to utilize the TRAP 
facilities (both enabling and disabling).

Peter R. or John E., would you care to comment on this?  Is there any chance 
that normal application-level code will be able use this facility any time soon?

And yes, I understand that you cannot comment on future directions, but any 
clue would be helpful.  At least we would have a some idea how long we have to 
wait for it.

Peter

-----Original Message-----
From: IBM Mainframe Discussion List [mailto:[email protected]] On Behalf 
Of John McKown
Sent: Monday, November 20, 2017 11:40 AM
To: [email protected]
Subject: Re: ECVTDUCU & "trap" condition in z/OS

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On Mon, Nov 20, 2017 at 10:36 AM, Farley, Peter x23353 < 
[email protected]> wrote:

> That is interesting John.  No such field in my V2.1 MODGEN library 
> member IHAECVT.  What offset it that at in your copy?
>

​Apparently came in with 2.2

https://www.ibm.com/support/knowledgecenter/en/SSLTBW_2.2.0/com.ibm.zos.v2r2.iead100/iead100662.htm

268 (10C) ADDRESS 4  ECVTDUCU "V(IEAVDUCU)" - DUCT update - A value of 0 in 
ECVTDUCU means that the function is not available - Caller must be AMODE 31 or 
64, key 0, supervisor state - Task mode - Primary ASC mode - Any P, Any S, Any 
H - To invoke the service: - Set GR 1 to 1 to indicate to update the TRAP 
Control Block Address - Set GR 0 to the address of the doubleword aligned TRAP 
Control Block Address (below 2G). Bits 0-31 of 64-bit GR0 are ignored. A 
non-zero value in bits 32-63 will enable the TRAP function. When enabling, bit 
63 is ignored. Bits 61-62 must be 0. Use a value of 0 in bits
32-63 to disable the TRAP function. - Load ECVTDUCU into GR 15. Do not use the 
LLGT instruction. You do not need to set bits 0-31 of 64-bit GR 15. - If AMODE 
64, issue BASSM 14,15 If AMODE 31, issue BASR 14,15 or BASSM 14,15
- Upon return from the service - 31-bit GRs 2-13, high halves 2-14, and ARs
2-14 will be preserved. Other GRs, high halves, and ARs may be used as work 
registers by the system. - On return R15 contains a return code 0 - success
8 - bad value in register 1 12 - TRAP update request in SRB mode ​

>
> One would HOPE such a field would be used by full z/OS support for 
> actually USING the TRAPx functionality (along with the several 
> compare-and-trap instructions too).
>
> Perhaps a "future use" field?
>
> Peter
>
>

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