@Peter, thank you.

Assume that code in question were to issue a CSST that successfully swapped
POINTER and stored a value at ADDRESS.

Question: is there any way for the 'examining' code, possibly running on a
different CPU, to be assured of seeing a consistent (either 'before' or
'after') POINTER and ADDRESS contents? Possibly with serialization at some
point?

Charles


-----Original Message-----
From: IBM Mainframe Discussion List [mailto:[email protected]] On
Behalf Of Peter Relson
Sent: Wednesday, September 13, 2017 4:33 PM
To: [email protected]
Subject: Re: CSST question

I thought Greg Dyck's post perfectly answered the what's and why's,
including the sole reason for which the instruction was created.

Disablement for external and I/O interrupts prevents the work unit from
being undispatched in between the serialized operation and the store that
sets the footprint.
CSST accomplishes that by combining the two into one instruction. Not having
to disable is of course simpler and also makes this function available to
problem state programs (since they cannot disable).

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