Ah!  My mistake, I misremembered the access method(s) mentioned in you note.

Thanks.

Peter

-----Original Message-----
From: IBM Mainframe Discussion List [mailto:[email protected]] On Behalf 
Of Don Poitras
Sent: Thursday, March 30, 2017 4:06 PM
To: [email protected]
Subject: Re: QSAM/VSAM buffers above the 4G bar?

Perhaps my note? Not QSAM, but EXCP and BSAM. See the doc talking
about the SF64 type on the READ and WRITE macros for BSAM. For EXCP,
the 64-bit buffer is pointed to by IDAW or MIDAW. 

In article 
<985915eee6984740ae93f8495c624c6c23c0e90...@jscpcwexmaa1.bsg.ad.adp.com> you 
wrote:
> I believe that I saw a statement here recently that at least QSAM buffers can 
> now be allocated above the 4G bar in 64-bit address space, but I cannot find 
> the email in which that statement appeared.

> Is this a true statement, and if so can someone point me to doc that shows 
> how and where to specify it?

> Is VSAM eligible to have buffers above the 4G bar?  If so, same request: 
> please point me to the doc on how and where it can be done.

> Lastly, if any of this is true, can SMB and/or BLSR support LSR buffers above 
> the 4G bar?  I'm thinking particularly of the BLSR parameters HBUFND and 
> HBUFNI: are they allocated above the 4G bar?  Those parameters originally 
> specified buffers in expanded storage, which is no longer available, right?

> TIA for curing my ignorance on this subject.

> Peter
> --

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