[email protected] (Elardus Engelbrecht) writes: > I also learned a lot thanks to you and your posts. Those posts from > Anne and Lynn Wheeler got me wheeling around with all those > interesting tid-bits which I'm still trying to digest... :-)
... mainframe chips now have to be made from process developed for other purposes ... since full yrs production of mainframe chips can be done in a couple minutes ... and they have to run a fab line nearly 7x24 all year to recover cost building fab. ec12@597, new 450mm wafer is 159,000 sq mm, or approx 266chips/wafer ... needing 1120chips/annum is 4wafers (less than typical minimum wafer run) ... fab doing 80K wafers/month is a couple minutes. if next generation went from 32nm to 14nm proccess less than half the size, approx. 5times the circuits per area, then possibly 30core ec12 chip in 597nm (instead of six-core) ... max. configured ec12 in four (30core) processor chips ... and full year market of mainframe sales with one wafer. similarly there haven't been any CKD DASD manufactured for decades, being simulated on industry standard fixed-block disks and IBM FICON channels are done with a heavy-weight simulation protocol layer on industry standard FCS (that also significantly cuts the native FCS throughput). post mentioning ficon http://www.garlic.com/~lynn/submisc.html#ficon posts mentioning CKD DASD http://www.garlic.com/~lynn/submain.html#dasd past posts in this thread: http://www.garlic.com/~lynn/2014h.html#2 Demonstrating Moore's law http://www.garlic.com/~lynn/2014h.html#4 Demonstrating Moore's law http://www.garlic.com/~lynn/2014h.html#5 Demonstrating Moore's law http://www.garlic.com/~lynn/2014h.html#6 Demonstrating Moore's law http://www.garlic.com/~lynn/2014h.html#7 Demonstrating Moore's law http://www.garlic.com/~lynn/2014h.html#8 Demonstrating Moore's law for disk capacity topic drift ... old post about progression of 3380 capacity (by cutting inter-track distance (starting out 20track widths distance between tracks) with several ancient email refs. http://www.garlic.com/~lynn/2007l.html#52 includes refs to proposal for doing wide-head that would read/write 16 data tracks in parallel (allowing nearly eliminating inter-track spacing) ... happening about the time that vertical recording was just starting to appear. -- virtualization experience starting Jan1968, online at home since Mar1970 ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
