Well, I don't know about your coffee, but if the next instruction is not in the high speed buffer... it is time for a coffee break for your processor ;-)
On Wed, Jan 22, 2014 at 3:53 PM, John McKown <[email protected]>wrote: > On Wed, Jan 22, 2014 at 6:58 AM, Steve Comstock <[email protected] > >wrote: > > > On 1/22/2014 12:57 AM, Itschak Mugzach wrote: > > > >> 64 bit addressing execution is faster if less access to real memory is > >> required to fetch the next instruction. This is what quadword promise, > >> is'It? the "performance gain" is also depend on the logic of the program > >> (if commands sequenced well with less brunch instructions). > >> > >> ITschak > >> > > > > Yes, I can see where brunch would slow things down. Almost makes > > one sleepy now ... :-) > > > > -Steve > > > > > Ah, our machine is old and so doesn't implement the brunch instruction. But > it seems to have a "coffee break" sequence in the microcode. I.e. it is > "knee capped". <GRIN/> > > > -- > Wasn't there something about a PASCAL programmer knowing the value of > everything and the Wirth of nothing? > > Maranatha! <>< > John McKown > > ---------------------------------------------------------------------- > For IBM-MAIN subscribe / signoff / archive access instructions, > send email to [email protected] with the message: INFO IBM-MAIN > ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
