An architecturally reusable address space is one which has the Reusable-ASN Bit (RA) bit turned on in the ASN-Second-Table Entry (ASTE), as described in Principles of Operation.
The z/OS considerations are documented here: https://www.ibm.com/docs/en/zos/2.5.0?topic=ra-coding-cross-memory-services-avoid-loss-asids-from-reuse Jim Mulder -----Original Message----- From: IBM Mainframe Discussion List <[email protected]> On Behalf Of [email protected] Sent: Sunday, January 15, 2023 8:47 AM To: [email protected] Subject: architecturally reusable address space Hello, . In an old post "LX and ASN reuse" dated May 1, 2007 I beloeve jim Mulder wrote: "The z/OS 1.9 manuals will document the mechanism for creating an architecturally reusable address space under z/OS and the programming issues for making use of these address spaces, so that may make the picture a bit clearer (although since I wrote the documentation, it may not be clear at all" . I suspect "architecturally reusable address space" is much more than LX and ASN reuse. . What determines an "architecturally reusable address space" ? What is the criteria used to identify "architecturally reusable address space" ? What techniques and mechanisms are used ? . Is this published anywhere ? . Paul DAngelo ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: INFO IBM-MAIN
