"MVS didn't use 2KiB pages," Yes, MVS 3.8J does use 2KB pages.
Joe On Tue, Sep 1, 2020 at 7:20 PM Seymour J Metz <sme...@gmu.edu> wrote: > MVS didn't use 2KiB pages, so I never paid any attention to whether the > 4341 or 3081 had them, but MVS/XA required DAS. Access registers came > later, on the 3090, and were part of ESA. > > The 4341 most definitely was not limited to a single address space; It ran > MVS/SP 1.3 just fine. > > > -- > Shmuel (Seymour J.) Metz > http://mason.gmu.edu/~smetz3 > > > ________________________________________ > From: IBM Mainframe Discussion List <IBM-MAIN@LISTSERV.UA.EDU> on behalf > of Mike Schwab <mike.a.sch...@gmail.com> > Sent: Tuesday, September 1, 2020 5:25 PM > To: IBM-MAIN@LISTSERV.UA.EDU > Subject: Re: Architectural Level Sets > > Well, XA+ machines only supported 4K pages / 1M segments and not 2K > pages / 64K segments. Then DAS and Access register additions. The > 43xx series only supported a single virtual address space, like > DOS/VSE. 3090s were the only processors to support Vector > instructions, and op codes were re-used in z series. > > On Tue, Sep 1, 2020 at 4:20 PM Tony Thigpen <t...@vse2pdf.com> wrote: > > > > I was thinking more along the lines of things that prevented earlier > > operating systems from even IPLing on newer boxes. Such as z13 is the > > last processor to have ESA/390 mode. I also have it in my head that at > > some point there were changes to the page size and virtual storage > > tables that caused havoc. > > > > Tony Thigpen > > > > Seymour J Metz wrote on 9/1/20 3:30 PM: > > > Typically the new features reqiured by a level set were added over > several generations, and each generation added more than one feature. > > > > > > > > > -- > > > Shmuel (Seymour J.) Metz > > > http://mason.gmu.edu/~smetz3 > > > > > > > > > ________________________________________ > > > From: IBM Mainframe Discussion List <IBM-MAIN@LISTSERV.UA.EDU> on > behalf of Tony Thigpen <t...@vse2pdf.com> > > > Sent: Tuesday, September 1, 2020 3:25 PM > > > To: IBM-MAIN@LISTSERV.UA.EDU > > > Subject: Architectural Level Sets > > > > > > IBM has had several Architectural Level Set points where there were > > > significant changes to the CPU that prevented earlier operating systems > > > from running on them. > > > > > > What CPU's were involved with each level, and what was the real > > > underlying item changed on the CPU that forced a new level? (Let's keep > > > it limited to z990 and newer.) > > > > > > > > > Tony Thigpen > > > > > > ---------------------------------------------------------------------- > > > For IBM-MAIN subscribe / signoff / archive access instructions, > > > send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN > > > > > > ---------------------------------------------------------------------- > > > For IBM-MAIN subscribe / signoff / archive access instructions, > > > send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN > > > > > > > ---------------------------------------------------------------------- > > For IBM-MAIN subscribe / signoff / archive access instructions, > > send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN > > > > -- > Mike A Schwab, Springfield IL USA > Where do Forest Rangers go to get away from it all? > > ---------------------------------------------------------------------- > For IBM-MAIN subscribe / signoff / archive access instructions, > send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN > > ---------------------------------------------------------------------- > For IBM-MAIN subscribe / signoff / archive access instructions, > send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN > ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to lists...@listserv.ua.edu with the message: INFO IBM-MAIN
