Hello. I’m reading Chapter 5 Using Access Registers in MVS Programming Extended Addressability Guide (SA23-1394-30). Pages 113 – 116 “Procedures for establishing addressability to an address space”Regarding Figure 38I understand the EAX value of PCRTN indexes into the AT of AS2.I understand PC routine contains an ALESERV ADD request for an address spaceI understand Issuing the ETDEF macro to build the PC routine's ETD with the EAX parameter code.It’s the Target Address Space (AS2) that I have issues with.First of all – I am assuming PCRTN resides in the Private Area of the Accessing Address Space (AS1) and PCRTN is defined as a Non- Space Switching, Stacking PC , with a System LX. Is My understanding correct ?.Second - if AS2 (The Target Address space) can switch to Supervisor State, issue ATSET and a Cross Memory Post why can’t it simply Establish and Setup Its Own Cross Memory Environment, allowing AS1 or any other Address Space the capability of issuing a PC calls to it directly ? The procedure described for AS2 in Figure 38 seems un-necessary to me..Third – Given the technique described for Figure 38 – wouldn’t it be more appropriate for AS1 to define two Non-Space Switching PC routines. One residing in the Private Area of AS1, and the other in LPA. This would allow AS2 to PC to the second PC routine (in LPA) to issue ATSET and a Cross Memory POST. Does this make better sense?.Fourth – is any one on this discussion list aware of any IBM product, or OEM Vendor product, or installation written software, that uses the technique described with Figure 38 ?.Paul D’Angelo.
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