IBM Mainframe Discussion List <[email protected]> wrote on 12/01/2010 11:25:54 AM:
> > You can use an ordinary branch instruction (e.g., BASSM 14,15) to branch to > > code above the bar. If you're running enabled, you won't execute > for long... :-D > > Just how does it fail? Is the PSW instruction address silently > truncated upon return from an interrupt as a result of its having been > saved in a legacy control block, leading to continued execution at a > presumably incorrect address, or is there some active detection and > abend? Something else? What if I install the same code at, say > 00000000_00123000 and 00000070_00123000, and branch to the > above-the-bar code? When a z/OS interrupt handler compresses a 16 byte PSW into 8 bytes, if the address does not fit into 31 bits, it turns on the low order bit in the address. When z/OS subsequently tries to return to or redispatch the interrupted work, it does a LPSW of the compressed 8 byte PSW, and a specification exception (0C6 ABEND) will occur due to the low order bit being on in the address in the PSW. This is the current state of affairs for all releases of z/OS up to and including z/OS 1.12. Jim Mulder z/OS System Test IBM Corp. Poughkeepsie, NY ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: GET IBM-MAIN INFO Search the archives at http://bama.ua.edu/archives/ibm-main.html
