On Wed, 1 Dec 2010 10:32:41 -0600, Chris Craddock wrote: > >there is a technique called "PSW scrunching" that allows saving an extended >PSW in a normal 8 byte PSW field when the instruction address is only 4 >bytes. > That implies, doesn't it, that in addition to the top 32 bits of the instruction address, 32 other bits in the 128-bit PSW are irrelevant and can be scrunched away? Hmmm... AMODE(31) goes back into bit 0 of 32, just like XA? And AMODE(64) into bit 31? It's a Good Thing that no one (well, not many) ever used bit 31 to bootleg one more flag.
But still, are there so many control blocks that need to store the PSW in 64 bits, but needn't store 64 bit registers? Those can't be scrunched. -- gil ---------------------------------------------------------------------- For IBM-MAIN subscribe / signoff / archive access instructions, send email to [email protected] with the message: GET IBM-MAIN INFO Search the archives at http://bama.ua.edu/archives/ibm-main.html
