So 64 bit mode is like a Dataspace
Sent from my iPhone
On Dec 1, 2010, at 12:09 AM, Chris Craddock <[email protected]>
wrote:
On Tue, Nov 30, 2010 at 9:43 PM, Gerhard Adam <[email protected]>
wrote:
How would you branch to code above the 2GB bar, since none is allowed
there?
The obvious problem being how you would even get it loaded up
there. If I
recall, the fundamental problem is that the PSW cannot be saved
with an
address greater than 31-bit for the next instruction since neither
the
TCB's
or RB's have a large enough area to store it.
I have a vague memory of reading, here or on the assembler mailing
list,
that you would need to run disabled if you wanted to branch to code
located above the bar. I also have a vague memory that the Wrath of
God would probably fall on you anyway if you tried it, disabled or
not.
Clearing the air: No, the SAM instructions don't cause you to become
disabled. They just switch addressing mode. It is perfectly ok
(normal even)
for ordinary garden variety programs to switch in and out of 64 bit
addressing mode. All z/OS code is loaded below 2GiB, so nothing
fancy needs
to be done to branch into 64 bit code.
However, if you were imagining you would be executing code that was
above
4GiB, then forget it. z/OS doesn't support it at all. Even if you
could somehow conspire to get some code into storage above the bar,
you
would not (in general) be able to execute it successfully because
none of
the major control blocks that manage dispatching work can support
saving a
full extended PSW, so while you might "get away with it" for a few
instructions, the moment you took an interrupt you'd be toast. Hence
the
putative requirement to run disabled. For the purposes of this
discussion
you may assume that's just a bonehead idea.
--
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artist formerly known as CC
(or not) You be the judge.
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