Hello, I am currently trying to figure out how to correctly pass CC variable to the make. Passing it as an make variable (`make CC=gcc') seems to work in almost all cases, but it fails for the `$(shell ...)' construct.
Given this simple Makefile:
yyy = $(shell env | grep ^foo=)
xxx:
echo /$(yyy)/
env | grep ^foo=
When executed, I get this output:
$ make foo=foof
echo //
//
env | grep ^foo=
foo=foof
As we can see, the `env | grep ^foo=' in the `xxx' target does see the value of
`foo'. However the `yyy', set using `$(shell ...)' is empty, so the `foo' is
not propagated there.
That seems somewhat limiting, I originally hit this when trying to figure out
why some detection scripts ran using `$(shell ...)' fail to find the C compiler.
Is this a bug or is this intentional? Is there an option I could use to change
the behavior?
I (think I) can just swap the order and do `CC=gcc make' in order to work around
the issue (is that correct assumption?), but would like to understand why it
behaves like this.
Have a nice day,
Tomas Volf
--
There are only two hard things in Computer Science:
cache invalidation, naming things and off-by-one errors.
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