Hi all,
Just a thought: wouldn't it be nice if, given:
FOO := a b c # note, no 'override' or anything
in the Makefile, we could do this from the command line:
make FOO+=d
such that FOO ends up "a b c d"? Many Makefiles don't have override;
suppose you want to tweak things from the command line without
touching the Makefile.
I understand that the += syntax already exists in the command line;
it allows for usage like make CFLAGS=-g CFLAGS+=-O.
So the above proposal would be a behavior change in command lines that
use +=
even on the very first assignment. That is not acceptable.
What if there was a way to access the original values of Makefile
variables that have been overridden from the command line?
Proposal: $(orig <name>) operator.
$(orig FOO) gives "a b c", even if FOO=d has been
specified on the command line.
Then, this is possible:
make FOO='1 $(orig FOO) d'
FOO ends up with '1 a b c d'.
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