In my Makefile, I have an include: "include some_other.makefile" and
that makefile is read correctly.
My issue is that if I make changes to some_other.makefile, none of the
targets in Makefile are remade, which is the desired behavior, so I do
not have to explicitly list "some_other.makefile" as a requisite for all
of my targets in Makefile.
Is there anyway to have my targets implicitly be remade for any changes
I make to files that I "include"?
-Dan
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