​Fortunately this is rather easy to reproduce without foreach: > $ cat /tmp/makefile > > define TEST_MACRO = > $(eval a=b) > $(eval a=b) > endef > > $(call TEST_MACRO) > > $ make -f /tmp/makefile > /tmp/makefile:8: *** missing separator. Stop.
The issue is that the evaluation of TEST_MACRO produced a non-empty string consisting of whitespace. Once make begins evaluating a line as in my example it assumes you're going to do something on that line, but what it gets back is something it cannot interpret as a valid makefile directive. You can resolve this problem by wrapping the foreach in a $(strip): > $(strip $(foreach ...)) -brian _______________________________________________ Help-make mailing list Help-make@gnu.org https://lists.gnu.org/mailman/listinfo/help-make
