At 06:51 AM 5/16/2004, Robert P. J. Day wrote:
currently, i have a rule that i expect to invoke with a couple variables from the command line -- call them A and B:
$ make A=somevalue B=someothervalue target
and the makefile will have the target:
target: @echo "A = $A" @echo "B = $B" ... rest of rule ...
now, for efficiency, i'll always use these variables as "${A}/${B}", so i just want to temporarily set that value to, say, C (and *only* within the scope of this rule):
Classic make, per se, offers no help with this. By the time you're into the command, make has handed off to the shell; you're not even operating in the make process anymore and the shell has no access to make's symbol table. But this is easily solved by setting up quoting such that A and B are expanded by make before handing off to the shell, whereas C is assigned as a *shell* variable which is assigned and then expanded by the shell. This in turn can be done two ways, either as an environment variable:
target:
@echo "A = $A"
@echo "B = $B"
C=$A/$B rest of rule ...Or you can set up C as a regular (unexported) shell variable:
target:
@echo "A = $A"
@echo "B = $B"
C=$A/$B;\
rest of rule ...I believe that with sufficiently modern versions of GNU make you could also make use of "target-specific variables", e.g.
target: C = $A/$B
(see http://www.gnu.org/software/make/manual/html_mono/make.html#SEC77) for details. But the traditional solution is probably preferable where applicable.
-David Boyce
PS You are tripping over the #1 obstacle to proper understanding of make: by default, each line of the command is executed as a separate script. In your example you were successfully setting C in one script, then letting that process end and expecting C to be still set in the next one. This is easily remedied by judicious use of backslashes as line continuation characters, as shown in my second example.
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