On 31 Aug 2010, at 10:23 pm, Justin Lloyd wrote:
> Here’s an interesting question for Nova users and/or Linux experts. I have a
> number of measurements promises that extract information about a system and
> store that data in our asset database. However, if dynamic CPU throttling is
> enabled on (mainly RHEL) Linux (e.g. cpuspeed), that value will change and we
> end up seeing toggling of that value in our asset database (via a report that
> tracks changes made to it by Cfengine).
>
> Currently I’m looking at /proc/cpuinfo:
>
> measurements:
>
> linux::
>
> "/proc/cpuinfo"
>
> handle => "linux_cpu_speed",
> stream_type => "file",
> data_type => "int",
> history_type => "scalar",
> units => "MHz",
> match_value => extract_line_value("cpu MHz.*", "cpu
> MHz\s+:\s+(\d+\.\d+)");
>
> This is the value that changes. One person here suggested looking at the
> “model name” entry in /proc/cpuinfo, to which newer systems statically add
> the default CPU speed, but unfortunately we have a lot of systems that don’t
> do that.
>
Parse it out of the output of dmidecode:
Processor Information
Socket Designation: Proc 1
Type: Central Processor
Family: Opteron
Manufacturer: AMD
ID: 12 0F 04 00 FF FB 8B 17
Signature: Extended Family 0, Model 1, Stepping 2
Flags:
FPU (Floating-point unit on-chip)
VME (Virtual mode extension)
DE (Debugging extension)
PSE (Page size extension)
TSC (Time stamp counter)
MSR (Model specific registers)
PAE (Physical address extension)
MCE (Machine check exception)
CX8 (CMPXCHG8 instruction supported)
APIC (On-chip APIC hardware supported)
SEP (Fast system call)
MTRR (Memory type range registers)
PGE (Page global enable)
MCA (Machine check architecture)
CMOV (Conditional move instruction supported)
PAT (Page attribute table)
PSE-36 (36-bit page size extension)
CLFSH (CLFLUSH instruction supported)
MMX (MMX technology supported)
FXSR (Fast floating-point save and restore)
SSE (Streaming SIMD extensions)
SSE2 (Streaming SIMD extensions 2)
HTT (Hyper-threading technology)
Version: Not Specified
Voltage: 1.4 V
External Clock: Unknown
Max Speed: 2800 MHz
Current Speed: 2600 MHz
Status: Populated, Enabled
Upgrade: ZIF Socket
L1 Cache Handle: 0x0710
L2 Cache Handle: 0x0720
L3 Cache Handle: Not Provided
Serial Number: Not Specified
Asset Tag: Not Specified
Part Number: Not Specified
Note the Max Speed line - might be what you want, although recent Intel chips
seem to lie about it, due to the fact they can switch cores off and increase
the clock on the remaining core. Take this from a Nehalem 5504 CPU, for
example:
Processor Information
Socket Designation: Proc 1
Type: Central Processor
Family: <OUT OF SPEC>
Manufacturer: Intel
ID: A5 06 01 00 FF FB EB BF
Version: Intel(R) Xeon(R) CPU E5504 @ 2.00GHz
Voltage: 1.4 V
External Clock: 133 MHz
Max Speed: 4800 MHz
Current Speed: 2000 MHz
Status: Populated, Enabled
Upgrade: <OUT OF SPEC>
L1 Cache Handle: 0x0710
L2 Cache Handle: 0x0720
L3 Cache Handle: 0x0730
Serial Number: Not Specified
Asset Tag: Not Specified
Part Number: Not Specified
Regards,
Tim
--
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