This is an automated email from the git hooks/post-receive script.
guix_mirror_bot pushed a commit to branch master
in repository guix.
The following commit(s) were added to refs/heads/master by this push:
new a66fce758b gnu: xschem: Update and improve package.
a66fce758b is described below
commit a66fce758b982ebae42cf55b91a148498ba24fc5
Author: Cayetano Santos <[email protected]>
AuthorDate: Wed Mar 4 08:14:43 2026 +0100
gnu: xschem: Update and improve package.
* gnu/packages/electronics.scm (xschem)[source]: Update url.
[inputs]: Add libjpeg-turbo.
[arguments]<#:phases>: Delete ’setenv; restore and customize ’configure.
[home-page]: Update.
Change-Id: I4262e40e9fb61e8413d39466351fcc75b0131631
---
gnu/packages/electronics.scm | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/gnu/packages/electronics.scm b/gnu/packages/electronics.scm
index d2688a2a0d..d1c1f4090a 100644
--- a/gnu/packages/electronics.scm
+++ b/gnu/packages/electronics.scm
@@ -3525,7 +3525,7 @@ and components. The following simulation kernels are
supported:
(origin
(method git-fetch)
(uri (git-reference
- (url "https://github.com/StefanSchippers/xschem")
+ (url "https://codeberg.org/stef_xschem/xschem/")
(commit version)))
(file-name (git-file-name name version))
(sha256
@@ -3537,17 +3537,17 @@ and components. The following simulation kernels are
supported:
tk
libxpm
cairo
+ libjpeg-turbo
libxrender
- libxcb)) ; Last 3 are optional, but good to have.
+ libxcb)) ; Last 4 are optional, but good to have.
(build-system gnu-build-system)
(arguments
(list
#:tests? #f
#:phases
#~(modify-phases %standard-phases
- (delete 'configure)
- (add-before 'build 'setenv
- (lambda* (#:key outputs #:allow-other-keys)
+ (replace 'configure
+ (lambda _
(setenv "CC" #$(cc-for-target))
(invoke "./configure" (string-append "--prefix=" #$output)))))))
(synopsis "Hierarchical schematic editor")
@@ -3555,7 +3555,7 @@ and components. The following simulation kernels are
supported:
"Xschem is an X11 schematic editor written in C and focused on
hierarchical and parametric design. It can generate VHDL, Verilog or Spice
netlists from the drawn schematic, allowing the simulation of the circuit.")
- (home-page "https://xschem.sourceforge.io/stefan/index.html")
+ (home-page "http://repo.hu/projects/xschem/xschem_man/xschem_man.html/")
(license license:gpl2+)))
(define-public route-rnd