On 2 Nov 1999, Marcus Sundberg wrote: > Basicly you never want to cache anything that sits on the other side > of the PCI-bus. MTRR write combining should always be turned on for > memory, but never for registers. That's about it. > AGP is ofcourse another story... > Eh.. Enabling MTRR write combining for the videomemory of some chips causes crashes. Yes it's me again with my outdated ViRGE :) And I like to know your AGP story, for it seems S3 has managed to get a ViRGE listening to an AGP bus... (AGP0.0001X or something...) Jos
- ATI Rage Pro 128 Per Wigren
- Re: ATI Rage Pro 128 James Simmons
- Re: ATI Rage Pro 128 Per Wigren
- Re: ATI Rage Pro 128 Jon M. Taylor
- Re: TI Rage Pro 128 Marcus Sundberg
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- Re: kgicon and low-level I/O Brian S. Julin
- Re: gicon and low-level I/O Marcus Sundberg
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- Re: gicon and low-level I/O Marcus Sundberg
- Re: gicon and low-level I/O Jon M. Taylor
- Re: kgicon and low-level I/O Christoph Egger
- Re: gicon and low-level I/O Marcus Sundberg
- Re: gicon and low-level I/O Christoph Egger
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