On Sat, Apr 22, 2017 at 2:41 PM, Poison BL. <poiso...@gmail.com> wrote: > On Sat, Apr 22, 2017 at 5:24 PM, Jorge Almeida <jjalme...@gmail.com> wrote:
> > While I don't have anything that new handy, the 6MB cache checks out against > intel's specs for the i5-7600. The broadwell i5-5675 lists off at a 4MB > cache (not including the eDRAM). GCC seems to like going with a slightly > more tried & true feature set when faced with a fancy, new, chip, in my > experience. Especially if the version of GCC in use isn't the absolute > bleeding edge latest and greatest. > Thanks. I suppose it's just a gcc thing, then. I just emerged gcc-5.4.0 and the output is the same, though. Jorge
