commit:     5e2eacd985d42204823341f4633ae0cd2d30955f
Author:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
AuthorDate: Sat Jun 24 15:04:40 2023 +0000
Commit:     Andreas K. Hüttel <dilfridge <AT> gentoo <DOT> org>
CommitDate: Sat Jun 24 15:04:40 2023 +0000
URL:        https://gitweb.gentoo.org/proj/releng.git/commit/?id=5e2eacd9

Add mips(el)2 musl builds

Signed-off-by: Andreas K. Hüttel <dilfridge <AT> gentoo.org>

 tools/catalyst-auto-qemu-mips-common | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/tools/catalyst-auto-qemu-mips-common 
b/tools/catalyst-auto-qemu-mips-common
index 9acc6929..ac398b49 100644
--- a/tools/catalyst-auto-qemu-mips-common
+++ b/tools/catalyst-auto-qemu-mips-common
@@ -12,11 +12,13 @@ SETS_O32="
        mips2_o32_systemd_mu
        mips2_softfloat_o32_openrc
        mips2_softfloat_o32_systemd
+       mips2_o32_musl
        mipsel2_o32_openrc
        mipsel2_o32_systemd
        mipsel2_o32_systemd_mu
        mipsel2_softfloat_o32_openrc
        mipsel2_softfloat_o32_systemd
+       mipsel2_o32_musl
        mipsel3_o32_openrc
        mipsel3_o32_systemd
        mipsel3_o32_systemd_mu
@@ -57,6 +59,8 @@ 
SET_mips2_o32_systemd_mu_SPECS="stage1-mips2-o32-systemd-mu.spec stage3-mips2-o3
 SET_mips2_softfloat_o32_openrc_SPECS="stage1-mips2_softfloat-o32-openrc.spec 
stage3-mips2_softfloat-o32-openrc.spec"
 SET_mips2_softfloat_o32_systemd_SPECS="stage1-mips2_softfloat-o32-systemd.spec 
stage3-mips2_softfloat-o32-systemd.spec"
 
+SET_mips2_o32_musl_SPECS="stage1-mips2-o32-musl.spec 
stage3-mips2-o32-musl.spec"
+
 SET_mipsel2_o32_openrc_SPECS="stage1-mipsel2-o32-openrc.spec 
stage3-mipsel2-o32-openrc.spec"
 SET_mipsel2_o32_systemd_SPECS="stage1-mipsel2-o32-systemd.spec 
stage3-mipsel2-o32-systemd.spec"
 SET_mipsel2_o32_systemd_mu_SPECS="stage1-mipsel2-o32-systemd-mu.spec 
stage3-mipsel2-o32-systemd-mu.spec"
@@ -64,6 +68,8 @@ 
SET_mipsel2_o32_systemd_mu_SPECS="stage1-mipsel2-o32-systemd-mu.spec stage3-mips
 
SET_mipsel2_softfloat_o32_openrc_SPECS="stage1-mipsel2_softfloat-o32-openrc.spec
 stage3-mipsel2_softfloat-o32-openrc.spec"
 
SET_mipsel2_softfloat_o32_systemd_SPECS="stage1-mipsel2_softfloat-o32-systemd.spec
 stage3-mipsel2_softfloat-o32-systemd.spec"
 
+SET_mipsel2_o32_musl_SPECS="stage1-mipsel2-o32-musl.spec 
stage3-mipsel2-o32-musl.spec"
+
 SET_mipsel3_o32_openrc_SPECS="stage1-mipsel3-o32-openrc.spec 
stage3-mipsel3-o32-openrc.spec"
 SET_mipsel3_o32_systemd_SPECS="stage1-mipsel3-o32-systemd.spec 
stage3-mipsel3-o32-systemd.spec"
 SET_mipsel3_o32_systemd_mu_SPECS="stage1-mipsel3-o32-systemd-mu.spec 
stage3-mipsel3-o32-systemd-mu.spec"
@@ -214,4 +220,15 @@ post_build() {
                ;;
        esac
        popd >/dev/null
+
+       pushd "${BUILD_SRCDIR_BASE}/builds/musl" >/dev/null
+       case ${spec} in
+       stage3-mips2-o32-musl.spec)
+               upload stage3-mips2-musl-${TIMESTAMP}.tar.xz*
+               ;;
+       stage3-mipsel2-o32-musl.spec)
+               upload stage3-mipsel2-musl-${TIMESTAMP}.tar.xz*
+               ;;
+       esac
+       popd >/dev/null
 }

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