commit: c0d0d030463194c0fc373cc47aa844c505eed41b Author: Mike Pagano <mpagano <AT> gentoo <DOT> org> AuthorDate: Sat May 22 16:50:34 2021 +0000 Commit: Mike Pagano <mpagano <AT> gentoo <DOT> org> CommitDate: Sat May 22 16:50:34 2021 +0000 URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=c0d0d030
Linux patch 5.12.6 Signed-off-by: Mike Pagano <mpagano <AT> gentoo.org> 0000_README | 4 + 1005_linux-5.12.6.patch | 1722 +++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 1726 insertions(+) diff --git a/0000_README b/0000_README index 055c634..e979ed2 100644 --- a/0000_README +++ b/0000_README @@ -63,6 +63,10 @@ Patch: 1004_linux-5.12.5.patch From: http://www.kernel.org Desc: Linux 5.12.5 +Patch: 1005_linux-5.12.6.patch +From: http://www.kernel.org +Desc: Linux 5.12.6 + Patch: 1500_XATTR_USER_PREFIX.patch From: https://bugs.gentoo.org/show_bug.cgi?id=470644 Desc: Support for namespace user.pax.* on tmpfs. diff --git a/1005_linux-5.12.6.patch b/1005_linux-5.12.6.patch new file mode 100644 index 0000000..d7987ca --- /dev/null +++ b/1005_linux-5.12.6.patch @@ -0,0 +1,1722 @@ +diff --git a/Makefile b/Makefile +index f60212a0412c8..dd021135838b8 100644 +--- a/Makefile ++++ b/Makefile +@@ -1,7 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 + VERSION = 5 + PATCHLEVEL = 12 +-SUBLEVEL = 5 ++SUBLEVEL = 6 + EXTRAVERSION = + NAME = Frozen Wasteland + +diff --git a/arch/arm/kernel/asm-offsets.c b/arch/arm/kernel/asm-offsets.c +index be8050b0c3dfb..70993af22d80c 100644 +--- a/arch/arm/kernel/asm-offsets.c ++++ b/arch/arm/kernel/asm-offsets.c +@@ -24,6 +24,7 @@ + #include <asm/vdso_datapage.h> + #include <asm/hardware/cache-l2x0.h> + #include <linux/kbuild.h> ++#include <linux/arm-smccc.h> + #include "signal.h" + + /* +@@ -148,6 +149,8 @@ int main(void) + DEFINE(SLEEP_SAVE_SP_PHYS, offsetof(struct sleep_save_sp, save_ptr_stash_phys)); + DEFINE(SLEEP_SAVE_SP_VIRT, offsetof(struct sleep_save_sp, save_ptr_stash)); + #endif ++ DEFINE(ARM_SMCCC_QUIRK_ID_OFFS, offsetof(struct arm_smccc_quirk, id)); ++ DEFINE(ARM_SMCCC_QUIRK_STATE_OFFS, offsetof(struct arm_smccc_quirk, state)); + BLANK(); + DEFINE(DMA_BIDIRECTIONAL, DMA_BIDIRECTIONAL); + DEFINE(DMA_TO_DEVICE, DMA_TO_DEVICE); +diff --git a/arch/arm/kernel/smccc-call.S b/arch/arm/kernel/smccc-call.S +index 00664c78facab..931df62a78312 100644 +--- a/arch/arm/kernel/smccc-call.S ++++ b/arch/arm/kernel/smccc-call.S +@@ -3,7 +3,9 @@ + * Copyright (c) 2015, Linaro Limited + */ + #include <linux/linkage.h> ++#include <linux/arm-smccc.h> + ++#include <asm/asm-offsets.h> + #include <asm/opcodes-sec.h> + #include <asm/opcodes-virt.h> + #include <asm/unwind.h> +@@ -27,7 +29,14 @@ UNWIND( .fnstart) + UNWIND( .save {r4-r7}) + ldm r12, {r4-r7} + \instr +- pop {r4-r7} ++ ldr r4, [sp, #36] ++ cmp r4, #0 ++ beq 1f // No quirk structure ++ ldr r5, [r4, #ARM_SMCCC_QUIRK_ID_OFFS] ++ cmp r5, #ARM_SMCCC_QUIRK_QCOM_A6 ++ bne 1f // No quirk present ++ str r6, [r4, #ARM_SMCCC_QUIRK_STATE_OFFS] ++1: pop {r4-r7} + ldr r12, [sp, #(4 * 4)] + stm r12, {r0-r3} + bx lr +diff --git a/arch/arm/kernel/suspend.c b/arch/arm/kernel/suspend.c +index 24bd20564be77..43f0a3ebf3909 100644 +--- a/arch/arm/kernel/suspend.c ++++ b/arch/arm/kernel/suspend.c +@@ -1,4 +1,5 @@ + // SPDX-License-Identifier: GPL-2.0 ++#include <linux/ftrace.h> + #include <linux/init.h> + #include <linux/slab.h> + #include <linux/mm_types.h> +@@ -25,6 +26,13 @@ int cpu_suspend(unsigned long arg, int (*fn)(unsigned long)) + if (!idmap_pgd) + return -EINVAL; + ++ /* ++ * Function graph tracer state gets incosistent when the kernel ++ * calls functions that never return (aka suspend finishers) hence ++ * disable graph tracing during their execution. ++ */ ++ pause_graph_tracing(); ++ + /* + * Provide a temporary page table with an identity mapping for + * the MMU-enable code, required for resuming. On successful +@@ -32,6 +40,9 @@ int cpu_suspend(unsigned long arg, int (*fn)(unsigned long)) + * back to the correct page tables. + */ + ret = __cpu_suspend(arg, fn, __mpidr); ++ ++ unpause_graph_tracing(); ++ + if (ret == 0) { + cpu_switch_mm(mm->pgd, mm); + local_flush_bp_all(); +@@ -45,7 +56,13 @@ int cpu_suspend(unsigned long arg, int (*fn)(unsigned long)) + int cpu_suspend(unsigned long arg, int (*fn)(unsigned long)) + { + u32 __mpidr = cpu_logical_map(smp_processor_id()); +- return __cpu_suspend(arg, fn, __mpidr); ++ int ret; ++ ++ pause_graph_tracing(); ++ ret = __cpu_suspend(arg, fn, __mpidr); ++ unpause_graph_tracing(); ++ ++ return ret; + } + #define idmap_pgd NULL + #endif +diff --git a/arch/riscv/include/asm/ftrace.h b/arch/riscv/include/asm/ftrace.h +index 845002cc2e571..04dad33800418 100644 +--- a/arch/riscv/include/asm/ftrace.h ++++ b/arch/riscv/include/asm/ftrace.h +@@ -13,9 +13,19 @@ + #endif + #define HAVE_FUNCTION_GRAPH_RET_ADDR_PTR + ++/* ++ * Clang prior to 13 had "mcount" instead of "_mcount": ++ * https://reviews.llvm.org/D98881 ++ */ ++#if defined(CONFIG_CC_IS_GCC) || CONFIG_CLANG_VERSION >= 130000 ++#define MCOUNT_NAME _mcount ++#else ++#define MCOUNT_NAME mcount ++#endif ++ + #define ARCH_SUPPORTS_FTRACE_OPS 1 + #ifndef __ASSEMBLY__ +-void _mcount(void); ++void MCOUNT_NAME(void); + static inline unsigned long ftrace_call_adjust(unsigned long addr) + { + return addr; +@@ -36,7 +46,7 @@ struct dyn_arch_ftrace { + * both auipc and jalr at the same time. + */ + +-#define MCOUNT_ADDR ((unsigned long)_mcount) ++#define MCOUNT_ADDR ((unsigned long)MCOUNT_NAME) + #define JALR_SIGN_MASK (0x00000800) + #define JALR_OFFSET_MASK (0x00000fff) + #define AUIPC_OFFSET_MASK (0xfffff000) +diff --git a/arch/riscv/kernel/mcount.S b/arch/riscv/kernel/mcount.S +index 8a5593ff9ff3d..6d462681c9c02 100644 +--- a/arch/riscv/kernel/mcount.S ++++ b/arch/riscv/kernel/mcount.S +@@ -47,8 +47,8 @@ + + ENTRY(ftrace_stub) + #ifdef CONFIG_DYNAMIC_FTRACE +- .global _mcount +- .set _mcount, ftrace_stub ++ .global MCOUNT_NAME ++ .set MCOUNT_NAME, ftrace_stub + #endif + ret + ENDPROC(ftrace_stub) +@@ -78,7 +78,7 @@ ENDPROC(return_to_handler) + #endif + + #ifndef CONFIG_DYNAMIC_FTRACE +-ENTRY(_mcount) ++ENTRY(MCOUNT_NAME) + la t4, ftrace_stub + #ifdef CONFIG_FUNCTION_GRAPH_TRACER + la t0, ftrace_graph_return +@@ -124,6 +124,6 @@ do_trace: + jalr t5 + RESTORE_ABI_STATE + ret +-ENDPROC(_mcount) ++ENDPROC(MCOUNT_NAME) + #endif +-EXPORT_SYMBOL(_mcount) ++EXPORT_SYMBOL(MCOUNT_NAME) +diff --git a/arch/riscv/kernel/vdso/Makefile b/arch/riscv/kernel/vdso/Makefile +index 71a315e73cbe7..ca2b40dfd24b8 100644 +--- a/arch/riscv/kernel/vdso/Makefile ++++ b/arch/riscv/kernel/vdso/Makefile +@@ -41,11 +41,10 @@ KASAN_SANITIZE := n + $(obj)/vdso.o: $(obj)/vdso.so + + # link rule for the .so file, .lds has to be first +-SYSCFLAGS_vdso.so.dbg = $(c_flags) + $(obj)/vdso.so.dbg: $(src)/vdso.lds $(obj-vdso) FORCE + $(call if_changed,vdsold) +-SYSCFLAGS_vdso.so.dbg = -shared -s -Wl,-soname=linux-vdso.so.1 \ +- -Wl,--build-id=sha1 -Wl,--hash-style=both ++LDFLAGS_vdso.so.dbg = -shared -s -soname=linux-vdso.so.1 \ ++ --build-id=sha1 --hash-style=both --eh-frame-hdr + + # We also create a special relocatable object that should mirror the symbol + # table and layout of the linked DSO. With ld --just-symbols we can then +@@ -60,13 +59,10 @@ $(obj)/%.so: $(obj)/%.so.dbg FORCE + + # actual build commands + # The DSO images are built using a special linker script +-# Add -lgcc so rv32 gets static muldi3 and lshrdi3 definitions. + # Make sure only to export the intended __vdso_xxx symbol offsets. + quiet_cmd_vdsold = VDSOLD $@ +- cmd_vdsold = $(CC) $(KBUILD_CFLAGS) $(call cc-option, -no-pie) -nostdlib -nostartfiles $(SYSCFLAGS_$(@F)) \ +- -Wl,-T,$(filter-out FORCE,$^) -o [email protected] && \ +- $(CROSS_COMPILE)objcopy \ +- $(patsubst %, -G __vdso_%, $(vdso-syms)) [email protected] $@ && \ ++ cmd_vdsold = $(LD) $(ld_flags) -T $(filter-out FORCE,$^) -o [email protected] && \ ++ $(OBJCOPY) $(patsubst %, -G __vdso_%, $(vdso-syms)) [email protected] $@ && \ + rm [email protected] + + # Extracts symbol offsets from the VDSO, converting them into an assembly file +diff --git a/arch/um/Kconfig.debug b/arch/um/Kconfig.debug +index 315d368e63adc..1dfb2959c73b8 100644 +--- a/arch/um/Kconfig.debug ++++ b/arch/um/Kconfig.debug +@@ -17,6 +17,7 @@ config GCOV + bool "Enable gcov support" + depends on DEBUG_INFO + depends on !KCOV ++ depends on !MODULES + help + This option allows developers to retrieve coverage data from a UML + session. +diff --git a/arch/um/kernel/Makefile b/arch/um/kernel/Makefile +index 5aa882011e041..e698e0c7dbdca 100644 +--- a/arch/um/kernel/Makefile ++++ b/arch/um/kernel/Makefile +@@ -21,7 +21,6 @@ obj-y = config.o exec.o exitcode.o irq.o ksyms.o mem.o \ + + obj-$(CONFIG_BLK_DEV_INITRD) += initrd.o + obj-$(CONFIG_GPROF) += gprof_syms.o +-obj-$(CONFIG_GCOV) += gmon_syms.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + obj-$(CONFIG_STACKTRACE) += stacktrace.o + +diff --git a/arch/um/kernel/dyn.lds.S b/arch/um/kernel/dyn.lds.S +index dacbfabf66d8e..2f2a8ce92f1ee 100644 +--- a/arch/um/kernel/dyn.lds.S ++++ b/arch/um/kernel/dyn.lds.S +@@ -6,6 +6,12 @@ OUTPUT_ARCH(ELF_ARCH) + ENTRY(_start) + jiffies = jiffies_64; + ++VERSION { ++ { ++ local: *; ++ }; ++} ++ + SECTIONS + { + PROVIDE (__executable_start = START); +diff --git a/arch/um/kernel/gmon_syms.c b/arch/um/kernel/gmon_syms.c +deleted file mode 100644 +index 9361a8eb9bf1a..0000000000000 +--- a/arch/um/kernel/gmon_syms.c ++++ /dev/null +@@ -1,16 +0,0 @@ +-// SPDX-License-Identifier: GPL-2.0 +-/* +- * Copyright (C) 2001 - 2007 Jeff Dike (jdike@{addtoit,linux.intel}.com) +- */ +- +-#include <linux/module.h> +- +-extern void __bb_init_func(void *) __attribute__((weak)); +-EXPORT_SYMBOL(__bb_init_func); +- +-extern void __gcov_init(void *) __attribute__((weak)); +-EXPORT_SYMBOL(__gcov_init); +-extern void __gcov_merge_add(void *, unsigned int) __attribute__((weak)); +-EXPORT_SYMBOL(__gcov_merge_add); +-extern void __gcov_exit(void) __attribute__((weak)); +-EXPORT_SYMBOL(__gcov_exit); +diff --git a/arch/um/kernel/uml.lds.S b/arch/um/kernel/uml.lds.S +index 45d957d7004ca..7a8e2b123e29c 100644 +--- a/arch/um/kernel/uml.lds.S ++++ b/arch/um/kernel/uml.lds.S +@@ -7,6 +7,12 @@ OUTPUT_ARCH(ELF_ARCH) + ENTRY(_start) + jiffies = jiffies_64; + ++VERSION { ++ { ++ local: *; ++ }; ++} ++ + SECTIONS + { + /* This must contain the right address - not quite the default ELF one.*/ +diff --git a/arch/x86/lib/msr-smp.c b/arch/x86/lib/msr-smp.c +index 75a0915b0d01d..40bbe56bde325 100644 +--- a/arch/x86/lib/msr-smp.c ++++ b/arch/x86/lib/msr-smp.c +@@ -252,7 +252,7 @@ static void __wrmsr_safe_regs_on_cpu(void *info) + rv->err = wrmsr_safe_regs(rv->regs); + } + +-int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 *regs) ++int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]) + { + int err; + struct msr_regs_info rv; +@@ -265,7 +265,7 @@ int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 *regs) + } + EXPORT_SYMBOL(rdmsr_safe_regs_on_cpu); + +-int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 *regs) ++int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 regs[8]) + { + int err; + struct msr_regs_info rv; +diff --git a/drivers/bus/mhi/core/boot.c b/drivers/bus/mhi/core/boot.c +index c2546bf229fb3..08c28740dc4e5 100644 +--- a/drivers/bus/mhi/core/boot.c ++++ b/drivers/bus/mhi/core/boot.c +@@ -389,7 +389,6 @@ static void mhi_firmware_copy(struct mhi_controller *mhi_cntrl, + void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) + { + const struct firmware *firmware = NULL; +- struct image_info *image_info; + struct device *dev = &mhi_cntrl->mhi_dev->dev; + const char *fw_name; + void *buf; +@@ -491,44 +490,42 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) + fw_load_ee_pthru: + /* Transitioning into MHI RESET->READY state */ + ret = mhi_ready_state_transition(mhi_cntrl); +- +- if (!mhi_cntrl->fbc_download) +- return; +- + if (ret) { + dev_err(dev, "MHI did not enter READY state\n"); + goto error_ready_state; + } + +- /* Wait for the SBL event */ +- ret = wait_event_timeout(mhi_cntrl->state_event, +- mhi_cntrl->ee == MHI_EE_SBL || +- MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state), +- msecs_to_jiffies(mhi_cntrl->timeout_ms)); ++ dev_info(dev, "Wait for device to enter SBL or Mission mode\n"); ++ return; + +- if (!ret || MHI_PM_IN_ERROR_STATE(mhi_cntrl->pm_state)) { +- dev_err(dev, "MHI did not enter SBL\n"); +- goto error_ready_state; ++error_ready_state: ++ if (mhi_cntrl->fbc_download) { ++ mhi_free_bhie_table(mhi_cntrl, mhi_cntrl->fbc_image); ++ mhi_cntrl->fbc_image = NULL; + } + +- /* Start full firmware image download */ +- image_info = mhi_cntrl->fbc_image; ++error_fw_load: ++ mhi_cntrl->pm_state = MHI_PM_FW_DL_ERR; ++ wake_up_all(&mhi_cntrl->state_event); ++} ++ ++int mhi_download_amss_image(struct mhi_controller *mhi_cntrl) ++{ ++ struct image_info *image_info = mhi_cntrl->fbc_image; ++ struct device *dev = &mhi_cntrl->mhi_dev->dev; ++ int ret; ++ ++ if (!image_info) ++ return -EIO; ++ + ret = mhi_fw_load_bhie(mhi_cntrl, + /* Vector table is the last entry */ + &image_info->mhi_buf[image_info->entries - 1]); + if (ret) { +- dev_err(dev, "MHI did not load image over BHIe, ret: %d\n", +- ret); +- goto error_fw_load; ++ dev_err(dev, "MHI did not load AMSS, ret:%d\n", ret); ++ mhi_cntrl->pm_state = MHI_PM_FW_DL_ERR; ++ wake_up_all(&mhi_cntrl->state_event); + } + +- return; +- +-error_ready_state: +- mhi_free_bhie_table(mhi_cntrl, mhi_cntrl->fbc_image); +- mhi_cntrl->fbc_image = NULL; +- +-error_fw_load: +- mhi_cntrl->pm_state = MHI_PM_FW_DL_ERR; +- wake_up_all(&mhi_cntrl->state_event); ++ return ret; + } +diff --git a/drivers/bus/mhi/core/internal.h b/drivers/bus/mhi/core/internal.h +index 6f80ec30c0cdc..6f37439e52472 100644 +--- a/drivers/bus/mhi/core/internal.h ++++ b/drivers/bus/mhi/core/internal.h +@@ -619,6 +619,7 @@ int mhi_pm_m3_transition(struct mhi_controller *mhi_cntrl); + int __mhi_device_get_sync(struct mhi_controller *mhi_cntrl); + int mhi_send_cmd(struct mhi_controller *mhi_cntrl, struct mhi_chan *mhi_chan, + enum mhi_cmd_type cmd); ++int mhi_download_amss_image(struct mhi_controller *mhi_cntrl); + static inline bool mhi_is_active(struct mhi_controller *mhi_cntrl) + { + return (mhi_cntrl->dev_state >= MHI_STATE_M0 && +diff --git a/drivers/bus/mhi/core/pm.c b/drivers/bus/mhi/core/pm.c +index 277704af7eb6f..87d3b73bcaded 100644 +--- a/drivers/bus/mhi/core/pm.c ++++ b/drivers/bus/mhi/core/pm.c +@@ -759,6 +759,8 @@ void mhi_pm_st_worker(struct work_struct *work) + * either SBL or AMSS states + */ + mhi_create_devices(mhi_cntrl); ++ if (mhi_cntrl->fbc_download) ++ mhi_download_amss_image(mhi_cntrl); + break; + case DEV_ST_TRANSITION_MISSION_MODE: + mhi_pm_mission_mode_transition(mhi_cntrl); +diff --git a/drivers/dma/dw-edma/dw-edma-core.c b/drivers/dma/dw-edma/dw-edma-core.c +index 08d71dafa0015..58c8cc8fe0e11 100644 +--- a/drivers/dma/dw-edma/dw-edma-core.c ++++ b/drivers/dma/dw-edma/dw-edma-core.c +@@ -937,22 +937,21 @@ int dw_edma_remove(struct dw_edma_chip *chip) + /* Power management */ + pm_runtime_disable(dev); + ++ /* Deregister eDMA device */ ++ dma_async_device_unregister(&dw->wr_edma); + list_for_each_entry_safe(chan, _chan, &dw->wr_edma.channels, + vc.chan.device_node) { +- list_del(&chan->vc.chan.device_node); + tasklet_kill(&chan->vc.task); ++ list_del(&chan->vc.chan.device_node); + } + ++ dma_async_device_unregister(&dw->rd_edma); + list_for_each_entry_safe(chan, _chan, &dw->rd_edma.channels, + vc.chan.device_node) { +- list_del(&chan->vc.chan.device_node); + tasklet_kill(&chan->vc.task); ++ list_del(&chan->vc.chan.device_node); + } + +- /* Deregister eDMA device */ +- dma_async_device_unregister(&dw->wr_edma); +- dma_async_device_unregister(&dw->rd_edma); +- + /* Turn debugfs off */ + dw_edma_v0_core_debugfs_off(); + +diff --git a/drivers/gpio/gpiolib-acpi.c b/drivers/gpio/gpiolib-acpi.c +index 1aacd2a5a1fd5..174839f3772f2 100644 +--- a/drivers/gpio/gpiolib-acpi.c ++++ b/drivers/gpio/gpiolib-acpi.c +@@ -1438,6 +1438,20 @@ static const struct dmi_system_id gpiolib_acpi_quirks[] __initconst = { + .no_edge_events_on_boot = true, + }, + }, ++ { ++ /* ++ * The Dell Venue 10 Pro 5055, with Bay Trail SoC + TI PMIC uses an ++ * external embedded-controller connected via I2C + an ACPI GPIO ++ * event handler on INT33FFC:02 pin 12, causing spurious wakeups. ++ */ ++ .matches = { ++ DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), ++ DMI_MATCH(DMI_PRODUCT_NAME, "Venue 10 Pro 5055"), ++ }, ++ .driver_data = &(struct acpi_gpiolib_dmi_quirk) { ++ .ignore_wake = "INT33FC:02@12", ++ }, ++ }, + { + /* + * HP X2 10 models with Cherry Trail SoC + TI PMIC use an +diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +index 71e07ebc8f88a..b63f55ea8758a 100644 +--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c ++++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +@@ -9344,6 +9344,53 @@ static int add_affected_mst_dsc_crtcs(struct drm_atomic_state *state, struct drm + } + #endif + ++static int validate_overlay(struct drm_atomic_state *state) ++{ ++ int i; ++ struct drm_plane *plane; ++ struct drm_plane_state *old_plane_state, *new_plane_state; ++ struct drm_plane_state *primary_state, *overlay_state = NULL; ++ ++ /* Check if primary plane is contained inside overlay */ ++ for_each_oldnew_plane_in_state_reverse(state, plane, old_plane_state, new_plane_state, i) { ++ if (plane->type == DRM_PLANE_TYPE_OVERLAY) { ++ if (drm_atomic_plane_disabling(plane->state, new_plane_state)) ++ return 0; ++ ++ overlay_state = new_plane_state; ++ continue; ++ } ++ } ++ ++ /* check if we're making changes to the overlay plane */ ++ if (!overlay_state) ++ return 0; ++ ++ /* check if overlay plane is enabled */ ++ if (!overlay_state->crtc) ++ return 0; ++ ++ /* find the primary plane for the CRTC that the overlay is enabled on */ ++ primary_state = drm_atomic_get_plane_state(state, overlay_state->crtc->primary); ++ if (IS_ERR(primary_state)) ++ return PTR_ERR(primary_state); ++ ++ /* check if primary plane is enabled */ ++ if (!primary_state->crtc) ++ return 0; ++ ++ /* Perform the bounds check to ensure the overlay plane covers the primary */ ++ if (primary_state->crtc_x < overlay_state->crtc_x || ++ primary_state->crtc_y < overlay_state->crtc_y || ++ primary_state->crtc_x + primary_state->crtc_w > overlay_state->crtc_x + overlay_state->crtc_w || ++ primary_state->crtc_y + primary_state->crtc_h > overlay_state->crtc_y + overlay_state->crtc_h) { ++ DRM_DEBUG_ATOMIC("Overlay plane is enabled with hardware cursor but does not fully cover primary plane\n"); ++ return -EINVAL; ++ } ++ ++ return 0; ++} ++ + /** + * amdgpu_dm_atomic_check() - Atomic check implementation for AMDgpu DM. + * @dev: The DRM device +@@ -9518,6 +9565,10 @@ static int amdgpu_dm_atomic_check(struct drm_device *dev, + goto fail; + } + ++ ret = validate_overlay(state); ++ if (ret) ++ goto fail; ++ + /* Add new/modified planes */ + for_each_oldnew_plane_in_state_reverse(state, plane, old_plane_state, new_plane_state, i) { + ret = dm_update_plane_state(dc, state, plane, +diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c +index 6e641f1513d80..fbff3df72e6c6 100644 +--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c ++++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/navi10_ppt.c +@@ -1110,7 +1110,6 @@ static int navi10_force_clk_levels(struct smu_context *smu, + case SMU_SOCCLK: + case SMU_MCLK: + case SMU_UCLK: +- case SMU_DCEFCLK: + case SMU_FCLK: + /* There is only 2 levels for fine grained DPM */ + if (navi10_is_support_fine_grained_dpm(smu, clk_type)) { +@@ -1130,6 +1129,10 @@ static int navi10_force_clk_levels(struct smu_context *smu, + if (ret) + return size; + break; ++ case SMU_DCEFCLK: ++ dev_info(smu->adev->dev,"Setting DCEFCLK min/max dpm level is not supported!\n"); ++ break; ++ + default: + break; + } +diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c +index af73e1430af53..61438940c26e8 100644 +--- a/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c ++++ b/drivers/gpu/drm/amd/pm/swsmu/smu11/sienna_cichlid_ppt.c +@@ -1127,7 +1127,6 @@ static int sienna_cichlid_force_clk_levels(struct smu_context *smu, + case SMU_SOCCLK: + case SMU_MCLK: + case SMU_UCLK: +- case SMU_DCEFCLK: + case SMU_FCLK: + /* There is only 2 levels for fine grained DPM */ + if (sienna_cichlid_is_support_fine_grained_dpm(smu, clk_type)) { +@@ -1147,6 +1146,9 @@ static int sienna_cichlid_force_clk_levels(struct smu_context *smu, + if (ret) + goto forec_level_out; + break; ++ case SMU_DCEFCLK: ++ dev_info(smu->adev->dev,"Setting DCEFCLK min/max dpm level is not supported!\n"); ++ break; + default: + break; + } +diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c +index 5a51036325647..97a785aa8839b 100644 +--- a/drivers/gpu/drm/i915/display/intel_dp.c ++++ b/drivers/gpu/drm/i915/display/intel_dp.c +@@ -4488,7 +4488,18 @@ intel_dp_check_mst_status(struct intel_dp *intel_dp) + drm_WARN_ON_ONCE(&i915->drm, intel_dp->active_mst_links < 0); + + for (;;) { +- u8 esi[DP_DPRX_ESI_LEN] = {}; ++ /* ++ * The +2 is because DP_DPRX_ESI_LEN is 14, but we then ++ * pass in "esi+10" to drm_dp_channel_eq_ok(), which ++ * takes a 6-byte array. So we actually need 16 bytes ++ * here. ++ * ++ * Somebody who knows what the limits actually are ++ * should check this, but for now this is at least ++ * harmless and avoids a valid compiler warning about ++ * using more of the array than we have allocated. ++ */ ++ u8 esi[DP_DPRX_ESI_LEN+2] = {}; + bool handled; + int retry; + +diff --git a/drivers/input/touchscreen/elants_i2c.c b/drivers/input/touchscreen/elants_i2c.c +index 5f7706febcb09..17540bdb1eaf7 100644 +--- a/drivers/input/touchscreen/elants_i2c.c ++++ b/drivers/input/touchscreen/elants_i2c.c +@@ -38,6 +38,7 @@ + #include <linux/of.h> + #include <linux/gpio/consumer.h> + #include <linux/regulator/consumer.h> ++#include <linux/uuid.h> + #include <asm/unaligned.h> + + /* Device, Driver information */ +@@ -1334,6 +1335,40 @@ static void elants_i2c_power_off(void *_data) + } + } + ++#ifdef CONFIG_ACPI ++static const struct acpi_device_id i2c_hid_ids[] = { ++ {"ACPI0C50", 0 }, ++ {"PNP0C50", 0 }, ++ { }, ++}; ++ ++static const guid_t i2c_hid_guid = ++ GUID_INIT(0x3CDFF6F7, 0x4267, 0x4555, ++ 0xAD, 0x05, 0xB3, 0x0A, 0x3D, 0x89, 0x38, 0xDE); ++ ++static bool elants_acpi_is_hid_device(struct device *dev) ++{ ++ acpi_handle handle = ACPI_HANDLE(dev); ++ union acpi_object *obj; ++ ++ if (acpi_match_device_ids(ACPI_COMPANION(dev), i2c_hid_ids)) ++ return false; ++ ++ obj = acpi_evaluate_dsm_typed(handle, &i2c_hid_guid, 1, 1, NULL, ACPI_TYPE_INTEGER); ++ if (obj) { ++ ACPI_FREE(obj); ++ return true; ++ } ++ ++ return false; ++} ++#else ++static bool elants_acpi_is_hid_device(struct device *dev) ++{ ++ return false; ++} ++#endif ++ + static int elants_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *id) + { +@@ -1342,9 +1377,14 @@ static int elants_i2c_probe(struct i2c_client *client, + unsigned long irqflags; + int error; + ++ /* Don't bind to i2c-hid compatible devices, these are handled by the i2c-hid drv. */ ++ if (elants_acpi_is_hid_device(&client->dev)) { ++ dev_warn(&client->dev, "This device appears to be an I2C-HID device, not binding\n"); ++ return -ENODEV; ++ } ++ + if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { +- dev_err(&client->dev, +- "%s: i2c check functionality error\n", DEVICE_NAME); ++ dev_err(&client->dev, "I2C check functionality error\n"); + return -ENXIO; + } + +diff --git a/drivers/input/touchscreen/silead.c b/drivers/input/touchscreen/silead.c +index 8fa2f3b7cfd8b..e8b6c3137420b 100644 +--- a/drivers/input/touchscreen/silead.c ++++ b/drivers/input/touchscreen/silead.c +@@ -20,6 +20,7 @@ + #include <linux/input/mt.h> + #include <linux/input/touchscreen.h> + #include <linux/pm.h> ++#include <linux/pm_runtime.h> + #include <linux/irq.h> + #include <linux/regulator/consumer.h> + +@@ -335,10 +336,8 @@ static int silead_ts_get_id(struct i2c_client *client) + + error = i2c_smbus_read_i2c_block_data(client, SILEAD_REG_ID, + sizeof(chip_id), (u8 *)&chip_id); +- if (error < 0) { +- dev_err(&client->dev, "Chip ID read error %d\n", error); ++ if (error < 0) + return error; +- } + + data->chip_id = le32_to_cpu(chip_id); + dev_info(&client->dev, "Silead chip ID: 0x%8X", data->chip_id); +@@ -351,12 +350,49 @@ static int silead_ts_setup(struct i2c_client *client) + int error; + u32 status; + ++ /* ++ * Some buggy BIOS-es bring up the chip in a stuck state where it ++ * blocks the I2C bus. The following steps are necessary to ++ * unstuck the chip / bus: ++ * 1. Turn off the Silead chip. ++ * 2. Try to do an I2C transfer with the chip, this will fail in ++ * response to which the I2C-bus-driver will call: ++ * i2c_recover_bus() which will unstuck the I2C-bus. Note the ++ * unstuck-ing of the I2C bus only works if we first drop the ++ * chip off the bus by turning it off. ++ * 3. Turn the chip back on. ++ * ++ * On the x86/ACPI systems were this problem is seen, step 1. and ++ * 3. require making ACPI calls and dealing with ACPI Power ++ * Resources. The workaround below runtime-suspends the chip to ++ * turn it off, leaving it up to the ACPI subsystem to deal with ++ * this. ++ */ ++ ++ if (device_property_read_bool(&client->dev, ++ "silead,stuck-controller-bug")) { ++ pm_runtime_set_active(&client->dev); ++ pm_runtime_enable(&client->dev); ++ pm_runtime_allow(&client->dev); ++ ++ pm_runtime_suspend(&client->dev); ++ ++ dev_warn(&client->dev, FW_BUG "Stuck I2C bus: please ignore the next 'controller timed out' error\n"); ++ silead_ts_get_id(client); ++ ++ /* The forbid will also resume the device */ ++ pm_runtime_forbid(&client->dev); ++ pm_runtime_disable(&client->dev); ++ } ++ + silead_ts_set_power(client, SILEAD_POWER_OFF); + silead_ts_set_power(client, SILEAD_POWER_ON); + + error = silead_ts_get_id(client); +- if (error) ++ if (error) { ++ dev_err(&client->dev, "Chip ID read error %d\n", error); + return error; ++ } + + error = silead_ts_init(client); + if (error) +diff --git a/drivers/misc/kgdbts.c b/drivers/misc/kgdbts.c +index 945701bce5536..2e081a58da6c5 100644 +--- a/drivers/misc/kgdbts.c ++++ b/drivers/misc/kgdbts.c +@@ -95,19 +95,19 @@ + + #include <asm/sections.h> + +-#define v1printk(a...) do { \ +- if (verbose) \ +- printk(KERN_INFO a); \ +- } while (0) +-#define v2printk(a...) do { \ +- if (verbose > 1) \ +- printk(KERN_INFO a); \ +- touch_nmi_watchdog(); \ +- } while (0) +-#define eprintk(a...) do { \ +- printk(KERN_ERR a); \ +- WARN_ON(1); \ +- } while (0) ++#define v1printk(a...) do { \ ++ if (verbose) \ ++ printk(KERN_INFO a); \ ++} while (0) ++#define v2printk(a...) do { \ ++ if (verbose > 1) \ ++ printk(KERN_INFO a); \ ++ touch_nmi_watchdog(); \ ++} while (0) ++#define eprintk(a...) do { \ ++ printk(KERN_ERR a); \ ++ WARN_ON(1); \ ++} while (0) + #define MAX_CONFIG_LEN 40 + + static struct kgdb_io kgdbts_io_ops; +diff --git a/drivers/net/ethernet/chelsio/cxgb4/sge.c b/drivers/net/ethernet/chelsio/cxgb4/sge.c +index 256fae15e032a..1e5f2edb70cf4 100644 +--- a/drivers/net/ethernet/chelsio/cxgb4/sge.c ++++ b/drivers/net/ethernet/chelsio/cxgb4/sge.c +@@ -2563,12 +2563,12 @@ int cxgb4_ethofld_send_flowc(struct net_device *dev, u32 eotid, u32 tc) + spin_lock_bh(&eosw_txq->lock); + if (tc != FW_SCHED_CLS_NONE) { + if (eosw_txq->state != CXGB4_EO_STATE_CLOSED) +- goto out_unlock; ++ goto out_free_skb; + + next_state = CXGB4_EO_STATE_FLOWC_OPEN_SEND; + } else { + if (eosw_txq->state != CXGB4_EO_STATE_ACTIVE) +- goto out_unlock; ++ goto out_free_skb; + + next_state = CXGB4_EO_STATE_FLOWC_CLOSE_SEND; + } +@@ -2604,17 +2604,19 @@ int cxgb4_ethofld_send_flowc(struct net_device *dev, u32 eotid, u32 tc) + eosw_txq_flush_pending_skbs(eosw_txq); + + ret = eosw_txq_enqueue(eosw_txq, skb); +- if (ret) { +- dev_consume_skb_any(skb); +- goto out_unlock; +- } ++ if (ret) ++ goto out_free_skb; + + eosw_txq->state = next_state; + eosw_txq->flowc_idx = eosw_txq->pidx; + eosw_txq_advance(eosw_txq, 1); + ethofld_xmit(dev, eosw_txq); + +-out_unlock: ++ spin_unlock_bh(&eosw_txq->lock); ++ return 0; ++ ++out_free_skb: ++ dev_consume_skb_any(skb); + spin_unlock_bh(&eosw_txq->lock); + return ret; + } +diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c +index 62aa0e95beb70..a7249e4071f16 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c ++++ b/drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c +@@ -222,7 +222,7 @@ static void dwmac4_dma_rx_chan_op_mode(void __iomem *ioaddr, int mode, + u32 channel, int fifosz, u8 qmode) + { + unsigned int rqs = fifosz / 256 - 1; +- u32 mtl_rx_op, mtl_rx_int; ++ u32 mtl_rx_op; + + mtl_rx_op = readl(ioaddr + MTL_CHAN_RX_OP_MODE(channel)); + +@@ -283,11 +283,6 @@ static void dwmac4_dma_rx_chan_op_mode(void __iomem *ioaddr, int mode, + } + + writel(mtl_rx_op, ioaddr + MTL_CHAN_RX_OP_MODE(channel)); +- +- /* Enable MTL RX overflow */ +- mtl_rx_int = readl(ioaddr + MTL_CHAN_INT_CTRL(channel)); +- writel(mtl_rx_int | MTL_RX_OVERFLOW_INT_EN, +- ioaddr + MTL_CHAN_INT_CTRL(channel)); + } + + static void dwmac4_dma_tx_chan_op_mode(void __iomem *ioaddr, int mode, +diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +index c6f24abf64328..369d7cde39933 100644 +--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c ++++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +@@ -4168,7 +4168,6 @@ static irqreturn_t stmmac_interrupt(int irq, void *dev_id) + /* To handle GMAC own interrupts */ + if ((priv->plat->has_gmac) || xmac) { + int status = stmmac_host_irq_status(priv, priv->hw, &priv->xstats); +- int mtl_status; + + if (unlikely(status)) { + /* For LPI we need to save the tx status */ +@@ -4179,17 +4178,8 @@ static irqreturn_t stmmac_interrupt(int irq, void *dev_id) + } + + for (queue = 0; queue < queues_count; queue++) { +- struct stmmac_rx_queue *rx_q = &priv->rx_queue[queue]; +- +- mtl_status = stmmac_host_mtl_irq_status(priv, priv->hw, +- queue); +- if (mtl_status != -EINVAL) +- status |= mtl_status; +- +- if (status & CORE_IRQ_MTL_RX_OVERFLOW) +- stmmac_set_rx_tail_ptr(priv, priv->ioaddr, +- rx_q->rx_tail_addr, +- queue); ++ status = stmmac_host_mtl_irq_status(priv, priv->hw, ++ queue); + } + + /* PCS link status */ +diff --git a/drivers/net/wireless/cisco/airo.c b/drivers/net/wireless/cisco/airo.c +index 60db38c389606..fd37d4d2983b6 100644 +--- a/drivers/net/wireless/cisco/airo.c ++++ b/drivers/net/wireless/cisco/airo.c +@@ -3817,6 +3817,68 @@ static inline void set_auth_type(struct airo_info *local, int auth_type) + local->last_auth = auth_type; + } + ++static int noinline_for_stack airo_readconfig(struct airo_info *ai, u8 *mac, int lock) ++{ ++ int i, status; ++ /* large variables, so don't inline this function, ++ * maybe change to kmalloc ++ */ ++ tdsRssiRid rssi_rid; ++ CapabilityRid cap_rid; ++ ++ kfree(ai->SSID); ++ ai->SSID = NULL; ++ // general configuration (read/modify/write) ++ status = readConfigRid(ai, lock); ++ if (status != SUCCESS) return ERROR; ++ ++ status = readCapabilityRid(ai, &cap_rid, lock); ++ if (status != SUCCESS) return ERROR; ++ ++ status = PC4500_readrid(ai, RID_RSSI, &rssi_rid, sizeof(rssi_rid), lock); ++ if (status == SUCCESS) { ++ if (ai->rssi || (ai->rssi = kmalloc(512, GFP_KERNEL)) != NULL) ++ memcpy(ai->rssi, (u8*)&rssi_rid + 2, 512); /* Skip RID length member */ ++ } ++ else { ++ kfree(ai->rssi); ++ ai->rssi = NULL; ++ if (cap_rid.softCap & cpu_to_le16(8)) ++ ai->config.rmode |= RXMODE_NORMALIZED_RSSI; ++ else ++ airo_print_warn(ai->dev->name, "unknown received signal " ++ "level scale"); ++ } ++ ai->config.opmode = adhoc ? MODE_STA_IBSS : MODE_STA_ESS; ++ set_auth_type(ai, AUTH_OPEN); ++ ai->config.modulation = MOD_CCK; ++ ++ if (le16_to_cpu(cap_rid.len) >= sizeof(cap_rid) && ++ (cap_rid.extSoftCap & cpu_to_le16(1)) && ++ micsetup(ai) == SUCCESS) { ++ ai->config.opmode |= MODE_MIC; ++ set_bit(FLAG_MIC_CAPABLE, &ai->flags); ++ } ++ ++ /* Save off the MAC */ ++ for (i = 0; i < ETH_ALEN; i++) { ++ mac[i] = ai->config.macAddr[i]; ++ } ++ ++ /* Check to see if there are any insmod configured ++ rates to add */ ++ if (rates[0]) { ++ memset(ai->config.rates, 0, sizeof(ai->config.rates)); ++ for (i = 0; i < 8 && rates[i]; i++) { ++ ai->config.rates[i] = rates[i]; ++ } ++ } ++ set_bit (FLAG_COMMIT, &ai->flags); ++ ++ return SUCCESS; ++} ++ ++ + static u16 setup_card(struct airo_info *ai, u8 *mac, int lock) + { + Cmd cmd; +@@ -3863,58 +3925,9 @@ static u16 setup_card(struct airo_info *ai, u8 *mac, int lock) + if (lock) + up(&ai->sem); + if (ai->config.len == 0) { +- int i; +- tdsRssiRid rssi_rid; +- CapabilityRid cap_rid; +- +- kfree(ai->SSID); +- ai->SSID = NULL; +- // general configuration (read/modify/write) +- status = readConfigRid(ai, lock); +- if (status != SUCCESS) return ERROR; +- +- status = readCapabilityRid(ai, &cap_rid, lock); +- if (status != SUCCESS) return ERROR; +- +- status = PC4500_readrid(ai, RID_RSSI,&rssi_rid, sizeof(rssi_rid), lock); +- if (status == SUCCESS) { +- if (ai->rssi || (ai->rssi = kmalloc(512, GFP_KERNEL)) != NULL) +- memcpy(ai->rssi, (u8*)&rssi_rid + 2, 512); /* Skip RID length member */ +- } +- else { +- kfree(ai->rssi); +- ai->rssi = NULL; +- if (cap_rid.softCap & cpu_to_le16(8)) +- ai->config.rmode |= RXMODE_NORMALIZED_RSSI; +- else +- airo_print_warn(ai->dev->name, "unknown received signal " +- "level scale"); +- } +- ai->config.opmode = adhoc ? MODE_STA_IBSS : MODE_STA_ESS; +- set_auth_type(ai, AUTH_OPEN); +- ai->config.modulation = MOD_CCK; +- +- if (le16_to_cpu(cap_rid.len) >= sizeof(cap_rid) && +- (cap_rid.extSoftCap & cpu_to_le16(1)) && +- micsetup(ai) == SUCCESS) { +- ai->config.opmode |= MODE_MIC; +- set_bit(FLAG_MIC_CAPABLE, &ai->flags); +- } +- +- /* Save off the MAC */ +- for (i = 0; i < ETH_ALEN; i++) { +- mac[i] = ai->config.macAddr[i]; +- } +- +- /* Check to see if there are any insmod configured +- rates to add */ +- if (rates[0]) { +- memset(ai->config.rates, 0, sizeof(ai->config.rates)); +- for (i = 0; i < 8 && rates[i]; i++) { +- ai->config.rates[i] = rates[i]; +- } +- } +- set_bit (FLAG_COMMIT, &ai->flags); ++ status = airo_readconfig(ai, mac, lock); ++ if (status != SUCCESS) ++ return ERROR; + } + + /* Setup the SSIDs if present */ +diff --git a/drivers/nvme/target/admin-cmd.c b/drivers/nvme/target/admin-cmd.c +index 81224447605b9..5a1ab49908c34 100644 +--- a/drivers/nvme/target/admin-cmd.c ++++ b/drivers/nvme/target/admin-cmd.c +@@ -307,7 +307,7 @@ static void nvmet_execute_get_log_page(struct nvmet_req *req) + case NVME_LOG_ANA: + return nvmet_execute_get_log_page_ana(req); + } +- pr_err("unhandled lid %d on qid %d\n", ++ pr_debug("unhandled lid %d on qid %d\n", + req->cmd->get_log_page.lid, req->sq->qid); + req->error_loc = offsetof(struct nvme_get_log_page_command, lid); + nvmet_req_complete(req, NVME_SC_INVALID_FIELD | NVME_SC_DNR); +@@ -659,7 +659,7 @@ static void nvmet_execute_identify(struct nvmet_req *req) + return nvmet_execute_identify_desclist(req); + } + +- pr_err("unhandled identify cns %d on qid %d\n", ++ pr_debug("unhandled identify cns %d on qid %d\n", + req->cmd->identify.cns, req->sq->qid); + req->error_loc = offsetof(struct nvme_identify, cns); + nvmet_req_complete(req, NVME_SC_INVALID_FIELD | NVME_SC_DNR); +@@ -977,7 +977,7 @@ u16 nvmet_parse_admin_cmd(struct nvmet_req *req) + return 0; + } + +- pr_err("unhandled cmd %d on qid %d\n", cmd->common.opcode, ++ pr_debug("unhandled cmd %d on qid %d\n", cmd->common.opcode, + req->sq->qid); + req->error_loc = offsetof(struct nvme_common_command, opcode); + return NVME_SC_INVALID_OPCODE | NVME_SC_DNR; +diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c +index 6fa216e52d142..0e94190ca4e88 100644 +--- a/drivers/pci/controller/dwc/pcie-tegra194.c ++++ b/drivers/pci/controller/dwc/pcie-tegra194.c +@@ -1645,7 +1645,7 @@ static void pex_ep_event_pex_rst_deassert(struct tegra_pcie_dw *pcie) + if (pcie->ep_state == EP_STATE_ENABLED) + return; + +- ret = pm_runtime_get_sync(dev); ++ ret = pm_runtime_resume_and_get(dev); + if (ret < 0) { + dev_err(dev, "Failed to get runtime sync for PCIe dev: %d\n", + ret); +diff --git a/drivers/pci/controller/pci-thunder-ecam.c b/drivers/pci/controller/pci-thunder-ecam.c +index f964fd26f7e0c..ffd84656544f2 100644 +--- a/drivers/pci/controller/pci-thunder-ecam.c ++++ b/drivers/pci/controller/pci-thunder-ecam.c +@@ -116,7 +116,7 @@ static int thunder_ecam_p2_config_read(struct pci_bus *bus, unsigned int devfn, + * the config space access window. Since we are working with + * the high-order 32 bits, shift everything down by 32 bits. + */ +- node_bits = (cfg->res.start >> 32) & (1 << 12); ++ node_bits = upper_32_bits(cfg->res.start) & (1 << 12); + + v |= node_bits; + set_val(v, where, size, val); +diff --git a/drivers/pci/controller/pci-thunder-pem.c b/drivers/pci/controller/pci-thunder-pem.c +index 1a3f70ac61fc3..0660b9da204f0 100644 +--- a/drivers/pci/controller/pci-thunder-pem.c ++++ b/drivers/pci/controller/pci-thunder-pem.c +@@ -12,6 +12,7 @@ + #include <linux/pci-acpi.h> + #include <linux/pci-ecam.h> + #include <linux/platform_device.h> ++#include <linux/io-64-nonatomic-lo-hi.h> + #include "../pci.h" + + #if defined(CONFIG_PCI_HOST_THUNDER_PEM) || (defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS)) +@@ -324,9 +325,9 @@ static int thunder_pem_init(struct device *dev, struct pci_config_window *cfg, + * structure here for the BAR. + */ + bar4_start = res_pem->start + 0xf00000; +- pem_pci->ea_entry[0] = (u32)bar4_start | 2; +- pem_pci->ea_entry[1] = (u32)(res_pem->end - bar4_start) & ~3u; +- pem_pci->ea_entry[2] = (u32)(bar4_start >> 32); ++ pem_pci->ea_entry[0] = lower_32_bits(bar4_start) | 2; ++ pem_pci->ea_entry[1] = lower_32_bits(res_pem->end - bar4_start) & ~3u; ++ pem_pci->ea_entry[2] = upper_32_bits(bar4_start); + + cfg->priv = pem_pci; + return 0; +@@ -334,9 +335,9 @@ static int thunder_pem_init(struct device *dev, struct pci_config_window *cfg, + + #if defined(CONFIG_ACPI) && defined(CONFIG_PCI_QUIRKS) + +-#define PEM_RES_BASE 0x87e0c0000000UL +-#define PEM_NODE_MASK GENMASK(45, 44) +-#define PEM_INDX_MASK GENMASK(26, 24) ++#define PEM_RES_BASE 0x87e0c0000000ULL ++#define PEM_NODE_MASK GENMASK_ULL(45, 44) ++#define PEM_INDX_MASK GENMASK_ULL(26, 24) + #define PEM_MIN_DOM_IN_NODE 4 + #define PEM_MAX_DOM_IN_NODE 10 + +diff --git a/drivers/pci/hotplug/acpiphp_glue.c b/drivers/pci/hotplug/acpiphp_glue.c +index 3365c93abf0e2..f031302ad4019 100644 +--- a/drivers/pci/hotplug/acpiphp_glue.c ++++ b/drivers/pci/hotplug/acpiphp_glue.c +@@ -533,6 +533,7 @@ static void enable_slot(struct acpiphp_slot *slot, bool bridge) + slot->flags &= ~SLOT_ENABLED; + continue; + } ++ pci_dev_put(dev); + } + } + +diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h +index ef7c4661314fa..9684b468267f2 100644 +--- a/drivers/pci/pci.h ++++ b/drivers/pci/pci.h +@@ -624,6 +624,12 @@ static inline int pci_dev_specific_reset(struct pci_dev *dev, int probe) + #if defined(CONFIG_PCI_QUIRKS) && defined(CONFIG_ARM64) + int acpi_get_rc_resources(struct device *dev, const char *hid, u16 segment, + struct resource *res); ++#else ++static inline int acpi_get_rc_resources(struct device *dev, const char *hid, ++ u16 segment, struct resource *res) ++{ ++ return -ENODEV; ++} + #endif + + int pci_rebar_get_current_size(struct pci_dev *pdev, int bar); +diff --git a/drivers/platform/chrome/cros_ec_typec.c b/drivers/platform/chrome/cros_ec_typec.c +index 0811562deecca..24be8f550ae00 100644 +--- a/drivers/platform/chrome/cros_ec_typec.c ++++ b/drivers/platform/chrome/cros_ec_typec.c +@@ -483,6 +483,11 @@ static int cros_typec_enable_dp(struct cros_typec_data *typec, + return -ENOTSUPP; + } + ++ if (!pd_ctrl->dp_mode) { ++ dev_err(typec->dev, "No valid DP mode provided.\n"); ++ return -EINVAL; ++ } ++ + /* Status VDO. */ + dp_data.status = DP_STATUS_ENABLED; + if (port->mux_flags & USB_PD_MUX_HPD_IRQ) +diff --git a/drivers/scsi/lpfc/lpfc_sli.c b/drivers/scsi/lpfc/lpfc_sli.c +index bd31feb3d5e18..920cf329268b5 100644 +--- a/drivers/scsi/lpfc/lpfc_sli.c ++++ b/drivers/scsi/lpfc/lpfc_sli.c +@@ -11807,13 +11807,20 @@ lpfc_sli_validate_fcp_iocb(struct lpfc_iocbq *iocbq, struct lpfc_vport *vport, + lpfc_ctx_cmd ctx_cmd) + { + struct lpfc_io_buf *lpfc_cmd; ++ IOCB_t *icmd = NULL; + int rc = 1; + + if (!iocbq || iocbq->vport != vport) + return rc; + +- if (!(iocbq->iocb_flag & LPFC_IO_FCP) || +- !(iocbq->iocb_flag & LPFC_IO_ON_TXCMPLQ)) ++ if (!(iocbq->iocb_flag & LPFC_IO_FCP) || ++ !(iocbq->iocb_flag & LPFC_IO_ON_TXCMPLQ) || ++ iocbq->iocb_flag & LPFC_DRIVER_ABORTED) ++ return rc; ++ ++ icmd = &iocbq->iocb; ++ if (icmd->ulpCommand == CMD_ABORT_XRI_CN || ++ icmd->ulpCommand == CMD_CLOSE_XRI_CN) + return rc; + + lpfc_cmd = container_of(iocbq, struct lpfc_io_buf, cur_iocbq); +diff --git a/drivers/target/target_core_user.c b/drivers/target/target_core_user.c +index bf73cd5f4b04c..6809c970be038 100644 +--- a/drivers/target/target_core_user.c ++++ b/drivers/target/target_core_user.c +@@ -1377,7 +1377,7 @@ static int tcmu_run_tmr_queue(struct tcmu_dev *udev) + return 1; + } + +-static unsigned int tcmu_handle_completions(struct tcmu_dev *udev) ++static bool tcmu_handle_completions(struct tcmu_dev *udev) + { + struct tcmu_mailbox *mb; + struct tcmu_cmd *cmd; +@@ -1420,7 +1420,7 @@ static unsigned int tcmu_handle_completions(struct tcmu_dev *udev) + pr_err("cmd_id %u not found, ring is broken\n", + entry->hdr.cmd_id); + set_bit(TCMU_DEV_BIT_BROKEN, &udev->flags); +- break; ++ return false; + } + + tcmu_handle_completion(cmd, entry); +diff --git a/drivers/usb/host/sl811-hcd.c b/drivers/usb/host/sl811-hcd.c +index 115ced0d93e10..1be692d3cf903 100644 +--- a/drivers/usb/host/sl811-hcd.c ++++ b/drivers/usb/host/sl811-hcd.c +@@ -1287,11 +1287,10 @@ sl811h_hub_control( + goto error; + put_unaligned_le32(sl811->port1, buf); + +-#ifndef VERBOSE +- if (*(u16*)(buf+2)) /* only if wPortChange is interesting */ +-#endif +- dev_dbg(hcd->self.controller, "GetPortStatus %08x\n", +- sl811->port1); ++ if (__is_defined(VERBOSE) || ++ *(u16*)(buf+2)) /* only if wPortChange is interesting */ ++ dev_dbg(hcd->self.controller, "GetPortStatus %08x\n", ++ sl811->port1); + break; + case SetPortFeature: + if (wIndex != 1 || wLength != 0) +diff --git a/fs/block_dev.c b/fs/block_dev.c +index 09d6f7229db9d..a5a6a7930e5ed 100644 +--- a/fs/block_dev.c ++++ b/fs/block_dev.c +@@ -1684,6 +1684,7 @@ ssize_t blkdev_write_iter(struct kiocb *iocb, struct iov_iter *from) + struct inode *bd_inode = bdev_file_inode(file); + loff_t size = i_size_read(bd_inode); + struct blk_plug plug; ++ size_t shorted = 0; + ssize_t ret; + + if (bdev_read_only(I_BDEV(bd_inode))) +@@ -1701,12 +1702,17 @@ ssize_t blkdev_write_iter(struct kiocb *iocb, struct iov_iter *from) + if ((iocb->ki_flags & (IOCB_NOWAIT | IOCB_DIRECT)) == IOCB_NOWAIT) + return -EOPNOTSUPP; + +- iov_iter_truncate(from, size - iocb->ki_pos); ++ size -= iocb->ki_pos; ++ if (iov_iter_count(from) > size) { ++ shorted = iov_iter_count(from) - size; ++ iov_iter_truncate(from, size); ++ } + + blk_start_plug(&plug); + ret = __generic_file_write_iter(iocb, from); + if (ret > 0) + ret = generic_write_sync(iocb, ret); ++ iov_iter_reexpand(from, iov_iter_count(from) + shorted); + blk_finish_plug(&plug); + return ret; + } +@@ -1718,13 +1724,21 @@ ssize_t blkdev_read_iter(struct kiocb *iocb, struct iov_iter *to) + struct inode *bd_inode = bdev_file_inode(file); + loff_t size = i_size_read(bd_inode); + loff_t pos = iocb->ki_pos; ++ size_t shorted = 0; ++ ssize_t ret; + + if (pos >= size) + return 0; + + size -= pos; +- iov_iter_truncate(to, size); +- return generic_file_read_iter(iocb, to); ++ if (iov_iter_count(to) > size) { ++ shorted = iov_iter_count(to) - size; ++ iov_iter_truncate(to, size); ++ } ++ ++ ret = generic_file_read_iter(iocb, to); ++ iov_iter_reexpand(to, iov_iter_count(to) + shorted); ++ return ret; + } + EXPORT_SYMBOL_GPL(blkdev_read_iter); + +diff --git a/fs/ceph/caps.c b/fs/ceph/caps.c +index 570731c4d019d..d405ba801492f 100644 +--- a/fs/ceph/caps.c ++++ b/fs/ceph/caps.c +@@ -1867,6 +1867,7 @@ static int try_nonblocking_invalidate(struct inode *inode) + u32 invalidating_gen = ci->i_rdcache_gen; + + spin_unlock(&ci->i_ceph_lock); ++ ceph_fscache_invalidate(inode); + invalidate_mapping_pages(&inode->i_data, 0, -1); + spin_lock(&ci->i_ceph_lock); + +diff --git a/fs/ceph/export.c b/fs/ceph/export.c +index baa6368bece59..042bb4a02c0a2 100644 +--- a/fs/ceph/export.c ++++ b/fs/ceph/export.c +@@ -129,6 +129,10 @@ static struct inode *__lookup_inode(struct super_block *sb, u64 ino) + + vino.ino = ino; + vino.snap = CEPH_NOSNAP; ++ ++ if (ceph_vino_is_reserved(vino)) ++ return ERR_PTR(-ESTALE); ++ + inode = ceph_find_inode(sb, vino); + if (!inode) { + struct ceph_mds_request *req; +@@ -214,6 +218,10 @@ static struct dentry *__snapfh_to_dentry(struct super_block *sb, + vino.ino = sfh->ino; + vino.snap = sfh->snapid; + } ++ ++ if (ceph_vino_is_reserved(vino)) ++ return ERR_PTR(-ESTALE); ++ + inode = ceph_find_inode(sb, vino); + if (inode) + return d_obtain_alias(inode); +diff --git a/fs/ceph/inode.c b/fs/ceph/inode.c +index 156f849f53856..179d2ef69a24a 100644 +--- a/fs/ceph/inode.c ++++ b/fs/ceph/inode.c +@@ -56,6 +56,9 @@ struct inode *ceph_get_inode(struct super_block *sb, struct ceph_vino vino) + { + struct inode *inode; + ++ if (ceph_vino_is_reserved(vino)) ++ return ERR_PTR(-EREMOTEIO); ++ + inode = iget5_locked(sb, (unsigned long)vino.ino, ceph_ino_compare, + ceph_set_ino_cb, &vino); + if (!inode) +@@ -87,14 +90,15 @@ struct inode *ceph_get_snapdir(struct inode *parent) + inode->i_mtime = parent->i_mtime; + inode->i_ctime = parent->i_ctime; + inode->i_atime = parent->i_atime; +- inode->i_op = &ceph_snapdir_iops; +- inode->i_fop = &ceph_snapdir_fops; +- ci->i_snap_caps = CEPH_CAP_PIN; /* so we can open */ + ci->i_rbytes = 0; + ci->i_btime = ceph_inode(parent)->i_btime; + +- if (inode->i_state & I_NEW) ++ if (inode->i_state & I_NEW) { ++ inode->i_op = &ceph_snapdir_iops; ++ inode->i_fop = &ceph_snapdir_fops; ++ ci->i_snap_caps = CEPH_CAP_PIN; /* so we can open */ + unlock_new_inode(inode); ++ } + + return inode; + } +@@ -1863,6 +1867,7 @@ static void ceph_do_invalidate_pages(struct inode *inode) + orig_gen = ci->i_rdcache_gen; + spin_unlock(&ci->i_ceph_lock); + ++ ceph_fscache_invalidate(inode); + if (invalidate_inode_pages2(inode->i_mapping) < 0) { + pr_err("invalidate_pages %p fails\n", inode); + } +diff --git a/fs/ceph/mds_client.c b/fs/ceph/mds_client.c +index d87bd852ed961..298cb0b3d28c0 100644 +--- a/fs/ceph/mds_client.c ++++ b/fs/ceph/mds_client.c +@@ -433,6 +433,13 @@ static int ceph_parse_deleg_inos(void **p, void *end, + + ceph_decode_64_safe(p, end, start, bad); + ceph_decode_64_safe(p, end, len, bad); ++ ++ /* Don't accept a delegation of system inodes */ ++ if (start < CEPH_INO_SYSTEM_BASE) { ++ pr_warn_ratelimited("ceph: ignoring reserved inode range delegation (start=0x%llx len=0x%llx)\n", ++ start, len); ++ continue; ++ } + while (len--) { + int err = xa_insert(&s->s_delegated_inos, ino = start++, + DELEGATED_INO_AVAILABLE, +diff --git a/fs/ceph/super.h b/fs/ceph/super.h +index c48bb30c8d70e..1d2fe70439bd0 100644 +--- a/fs/ceph/super.h ++++ b/fs/ceph/super.h +@@ -529,10 +529,34 @@ static inline int ceph_ino_compare(struct inode *inode, void *data) + ci->i_vino.snap == pvino->snap; + } + ++/* ++ * The MDS reserves a set of inodes for its own usage. These should never ++ * be accessible by clients, and so the MDS has no reason to ever hand these ++ * out. The range is CEPH_MDS_INO_MDSDIR_OFFSET..CEPH_INO_SYSTEM_BASE. ++ * ++ * These come from src/mds/mdstypes.h in the ceph sources. ++ */ ++#define CEPH_MAX_MDS 0x100 ++#define CEPH_NUM_STRAY 10 ++#define CEPH_MDS_INO_MDSDIR_OFFSET (1 * CEPH_MAX_MDS) ++#define CEPH_INO_SYSTEM_BASE ((6*CEPH_MAX_MDS) + (CEPH_MAX_MDS * CEPH_NUM_STRAY)) ++ ++static inline bool ceph_vino_is_reserved(const struct ceph_vino vino) ++{ ++ if (vino.ino < CEPH_INO_SYSTEM_BASE && ++ vino.ino >= CEPH_MDS_INO_MDSDIR_OFFSET) { ++ WARN_RATELIMIT(1, "Attempt to access reserved inode number 0x%llx", vino.ino); ++ return true; ++ } ++ return false; ++} + + static inline struct inode *ceph_find_inode(struct super_block *sb, + struct ceph_vino vino) + { ++ if (ceph_vino_is_reserved(vino)) ++ return NULL; ++ + /* + * NB: The hashval will be run through the fs/inode.c hash function + * anyway, so there is no need to squash the inode number down to +diff --git a/fs/f2fs/segment.c b/fs/f2fs/segment.c +index 77456d228f2a1..bb6d862557410 100644 +--- a/fs/f2fs/segment.c ++++ b/fs/f2fs/segment.c +@@ -186,7 +186,10 @@ void f2fs_register_inmem_page(struct inode *inode, struct page *page) + { + struct inmem_pages *new; + +- f2fs_set_page_private(page, ATOMIC_WRITTEN_PAGE); ++ if (PagePrivate(page)) ++ set_page_private(page, (unsigned long)ATOMIC_WRITTEN_PAGE); ++ else ++ f2fs_set_page_private(page, ATOMIC_WRITTEN_PAGE); + + new = f2fs_kmem_cache_alloc(inmem_entry_slab, GFP_NOFS); + +diff --git a/fs/nfs/inode.c b/fs/nfs/inode.c +index 7cfeee3eeef7f..ae8bc84e39fb3 100644 +--- a/fs/nfs/inode.c ++++ b/fs/nfs/inode.c +@@ -219,15 +219,16 @@ void nfs_set_cache_invalid(struct inode *inode, unsigned long flags) + | NFS_INO_INVALID_SIZE + | NFS_INO_REVAL_PAGECACHE + | NFS_INO_INVALID_XATTR); +- } ++ } else if (flags & NFS_INO_REVAL_PAGECACHE) ++ flags |= NFS_INO_INVALID_CHANGE | NFS_INO_INVALID_SIZE; + + if (!nfs_has_xattr_cache(nfsi)) + flags &= ~NFS_INO_INVALID_XATTR; ++ if (flags & NFS_INO_INVALID_DATA) ++ nfs_fscache_invalidate(inode); + if (inode->i_mapping->nrpages == 0) + flags &= ~(NFS_INO_INVALID_DATA|NFS_INO_DATA_INVAL_DEFER); + nfsi->cache_validity |= flags; +- if (flags & NFS_INO_INVALID_DATA) +- nfs_fscache_invalidate(inode); + } + EXPORT_SYMBOL_GPL(nfs_set_cache_invalid); + +diff --git a/lib/stackdepot.c b/lib/stackdepot.c +index 49f67a0c6e5d2..df9179f4f4414 100644 +--- a/lib/stackdepot.c ++++ b/lib/stackdepot.c +@@ -71,7 +71,7 @@ static void *stack_slabs[STACK_ALLOC_MAX_SLABS]; + static int depot_index; + static int next_slab_inited; + static size_t depot_offset; +-static DEFINE_SPINLOCK(depot_lock); ++static DEFINE_RAW_SPINLOCK(depot_lock); + + static bool init_stack_slab(void **prealloc) + { +@@ -305,7 +305,7 @@ depot_stack_handle_t stack_depot_save(unsigned long *entries, + prealloc = page_address(page); + } + +- spin_lock_irqsave(&depot_lock, flags); ++ raw_spin_lock_irqsave(&depot_lock, flags); + + found = find_stack(*bucket, entries, nr_entries, hash); + if (!found) { +@@ -329,7 +329,7 @@ depot_stack_handle_t stack_depot_save(unsigned long *entries, + WARN_ON(!init_stack_slab(&prealloc)); + } + +- spin_unlock_irqrestore(&depot_lock, flags); ++ raw_spin_unlock_irqrestore(&depot_lock, flags); + exit: + if (prealloc) { + /* Nobody used this memory, ok to free it. */ +diff --git a/net/bridge/br_netlink.c b/net/bridge/br_netlink.c +index 0456593aceec1..e4e6e991313e7 100644 +--- a/net/bridge/br_netlink.c ++++ b/net/bridge/br_netlink.c +@@ -103,8 +103,9 @@ static size_t br_get_link_af_size_filtered(const struct net_device *dev, + + rcu_read_lock(); + if (netif_is_bridge_port(dev)) { +- p = br_port_get_rcu(dev); +- vg = nbp_vlan_group_rcu(p); ++ p = br_port_get_check_rcu(dev); ++ if (p) ++ vg = nbp_vlan_group_rcu(p); + } else if (dev->priv_flags & IFF_EBRIDGE) { + br = netdev_priv(dev); + vg = br_vlan_group_rcu(br); +diff --git a/net/hsr/hsr_forward.c b/net/hsr/hsr_forward.c +index b218e4594009c..6852e9bccf5b8 100644 +--- a/net/hsr/hsr_forward.c ++++ b/net/hsr/hsr_forward.c +@@ -520,6 +520,10 @@ static int fill_frame_info(struct hsr_frame_info *frame, + struct ethhdr *ethhdr; + __be16 proto; + ++ /* Check if skb contains hsr_ethhdr */ ++ if (skb->mac_len < sizeof(struct hsr_ethhdr)) ++ return -EINVAL; ++ + memset(frame, 0, sizeof(*frame)); + frame->is_supervision = is_supervision_frame(port->hsr, skb); + frame->node_src = hsr_get_node(port, &hsr->node_db, skb, +diff --git a/net/ipv6/ip6_gre.c b/net/ipv6/ip6_gre.c +index 1baf43aacb2e4..bc224f917bbd5 100644 +--- a/net/ipv6/ip6_gre.c ++++ b/net/ipv6/ip6_gre.c +@@ -387,7 +387,6 @@ static struct ip6_tnl *ip6gre_tunnel_locate(struct net *net, + if (!(nt->parms.o_flags & TUNNEL_SEQ)) + dev->features |= NETIF_F_LLTX; + +- dev_hold(dev); + ip6gre_tunnel_link(ign, nt); + return nt; + +@@ -1496,6 +1495,7 @@ static int ip6gre_tunnel_init_common(struct net_device *dev) + } + ip6gre_tnl_init_features(dev); + ++ dev_hold(dev); + return 0; + + cleanup_dst_cache_init: +@@ -1538,8 +1538,6 @@ static void ip6gre_fb_tunnel_init(struct net_device *dev) + strcpy(tunnel->parms.name, dev->name); + + tunnel->hlen = sizeof(struct ipv6hdr) + 4; +- +- dev_hold(dev); + } + + static struct inet6_protocol ip6gre_protocol __read_mostly = { +@@ -1889,6 +1887,7 @@ static int ip6erspan_tap_init(struct net_device *dev) + dev->priv_flags |= IFF_LIVE_ADDR_CHANGE; + ip6erspan_tnl_link_config(tunnel, 1); + ++ dev_hold(dev); + return 0; + + cleanup_dst_cache_init: +@@ -1988,8 +1987,6 @@ static int ip6gre_newlink_common(struct net *src_net, struct net_device *dev, + if (tb[IFLA_MTU]) + ip6_tnl_change_mtu(dev, nla_get_u32(tb[IFLA_MTU])); + +- dev_hold(dev); +- + out: + return err; + } +diff --git a/net/ipv6/ip6_tunnel.c b/net/ipv6/ip6_tunnel.c +index 42fe7db6bbb37..d42f471b0d655 100644 +--- a/net/ipv6/ip6_tunnel.c ++++ b/net/ipv6/ip6_tunnel.c +@@ -266,7 +266,6 @@ static int ip6_tnl_create2(struct net_device *dev) + + strcpy(t->parms.name, dev->name); + +- dev_hold(dev); + ip6_tnl_link(ip6n, t); + return 0; + +@@ -1882,6 +1881,7 @@ ip6_tnl_dev_init_gen(struct net_device *dev) + dev->min_mtu = ETH_MIN_MTU; + dev->max_mtu = IP6_MAX_MTU - dev->hard_header_len; + ++ dev_hold(dev); + return 0; + + destroy_dst: +@@ -1925,7 +1925,6 @@ static int __net_init ip6_fb_tnl_dev_init(struct net_device *dev) + struct ip6_tnl_net *ip6n = net_generic(net, ip6_tnl_net_id); + + t->parms.proto = IPPROTO_IPV6; +- dev_hold(dev); + + rcu_assign_pointer(ip6n->tnls_wc[0], t); + return 0; +diff --git a/net/ipv6/ip6_vti.c b/net/ipv6/ip6_vti.c +index 932b15b13053d..2d048e21abbba 100644 +--- a/net/ipv6/ip6_vti.c ++++ b/net/ipv6/ip6_vti.c +@@ -965,7 +965,6 @@ static int __net_init vti6_fb_tnl_dev_init(struct net_device *dev) + struct vti6_net *ip6n = net_generic(net, vti6_net_id); + + t->parms.proto = IPPROTO_IPV6; +- dev_hold(dev); + + rcu_assign_pointer(ip6n->tnls_wc[0], t); + return 0; +diff --git a/net/ipv6/sit.c b/net/ipv6/sit.c +index 9fdccf0718b59..fcc9ba2c80e95 100644 +--- a/net/ipv6/sit.c ++++ b/net/ipv6/sit.c +@@ -218,8 +218,6 @@ static int ipip6_tunnel_create(struct net_device *dev) + + ipip6_tunnel_clone_6rd(dev, sitn); + +- dev_hold(dev); +- + ipip6_tunnel_link(sitn, t); + return 0; + +@@ -1456,7 +1454,7 @@ static int ipip6_tunnel_init(struct net_device *dev) + dev->tstats = NULL; + return err; + } +- ++ dev_hold(dev); + return 0; + } + +@@ -1472,7 +1470,6 @@ static void __net_init ipip6_fb_tunnel_init(struct net_device *dev) + iph->ihl = 5; + iph->ttl = 64; + +- dev_hold(dev); + rcu_assign_pointer(sitn->tunnels_wc[0], tunnel); + } + +diff --git a/net/sunrpc/xprtrdma/svc_rdma_sendto.c b/net/sunrpc/xprtrdma/svc_rdma_sendto.c +index 52c759a8543ec..3669661457c15 100644 +--- a/net/sunrpc/xprtrdma/svc_rdma_sendto.c ++++ b/net/sunrpc/xprtrdma/svc_rdma_sendto.c +@@ -958,7 +958,7 @@ int svc_rdma_sendto(struct svc_rqst *rqstp) + p = xdr_reserve_space(&sctxt->sc_stream, + rpcrdma_fixed_maxsz * sizeof(*p)); + if (!p) +- goto err0; ++ goto err1; + + ret = svc_rdma_send_reply_chunk(rdma, rctxt, &rqstp->rq_res); + if (ret < 0) +@@ -970,11 +970,11 @@ int svc_rdma_sendto(struct svc_rqst *rqstp) + *p = pcl_is_empty(&rctxt->rc_reply_pcl) ? rdma_msg : rdma_nomsg; + + if (svc_rdma_encode_read_list(sctxt) < 0) +- goto err0; ++ goto err1; + if (svc_rdma_encode_write_list(rctxt, sctxt) < 0) +- goto err0; ++ goto err1; + if (svc_rdma_encode_reply_chunk(rctxt, sctxt, ret) < 0) +- goto err0; ++ goto err1; + + ret = svc_rdma_send_reply_msg(rdma, sctxt, rctxt, rqstp); + if (ret < 0) +diff --git a/scripts/recordmcount.pl b/scripts/recordmcount.pl +index 867860ea57daa..7b83a1aaec98d 100755 +--- a/scripts/recordmcount.pl ++++ b/scripts/recordmcount.pl +@@ -392,7 +392,7 @@ if ($arch eq "x86_64") { + $mcount_regex = "^\\s*([0-9a-fA-F]+):.*\\s_mcount\$"; + } elsif ($arch eq "riscv") { + $function_regex = "^([0-9a-fA-F]+)\\s+<([^.0-9][0-9a-zA-Z_\\.]+)>:"; +- $mcount_regex = "^\\s*([0-9a-fA-F]+):\\sR_RISCV_CALL\\s_mcount\$"; ++ $mcount_regex = "^\\s*([0-9a-fA-F]+):\\sR_RISCV_CALL(_PLT)?\\s_?mcount\$"; + $type = ".quad"; + $alignment = 2; + } elsif ($arch eq "nds32") { +diff --git a/sound/pci/hda/hda_generic.c b/sound/pci/hda/hda_generic.c +index f5cba7afd1c66..ff0fb2d16d82f 100644 +--- a/sound/pci/hda/hda_generic.c ++++ b/sound/pci/hda/hda_generic.c +@@ -1202,11 +1202,17 @@ static const char *get_line_out_pfx(struct hda_codec *codec, int ch, + *index = ch; + return "Headphone"; + case AUTO_PIN_LINE_OUT: +- /* This deals with the case where we have two DACs and +- * one LO, one HP and one Speaker */ +- if (!ch && cfg->speaker_outs && cfg->hp_outs) { +- bool hp_lo_shared = !path_has_mixer(codec, spec->hp_paths[0], ctl_type); +- bool spk_lo_shared = !path_has_mixer(codec, spec->speaker_paths[0], ctl_type); ++ /* This deals with the case where one HP or one Speaker or ++ * one HP + one Speaker need to share the DAC with LO ++ */ ++ if (!ch) { ++ bool hp_lo_shared = false, spk_lo_shared = false; ++ ++ if (cfg->speaker_outs) ++ spk_lo_shared = !path_has_mixer(codec, ++ spec->speaker_paths[0], ctl_type); ++ if (cfg->hp_outs) ++ hp_lo_shared = !path_has_mixer(codec, spec->hp_paths[0], ctl_type); + if (hp_lo_shared && spk_lo_shared) + return spec->vmaster_mute.hook ? "PCM" : "Master"; + if (hp_lo_shared)
