commit: 66d2cda2fe1065509907732ca1e00b1e19072a6b Author: Andreas Sturmlechner <asturm <AT> gentoo <DOT> org> AuthorDate: Sat Aug 30 14:25:27 2025 +0000 Commit: Andreas Sturmlechner <asturm <AT> gentoo <DOT> org> CommitDate: Sun Aug 31 09:54:56 2025 +0000 URL: https://gitweb.gentoo.org/repo/gentoo.git/commit/?id=66d2cda2
dev-cpp/xsimd: drop 13.1.0 Bug: https://bugs.gentoo.org/960782 Signed-off-by: Andreas Sturmlechner <asturm <AT> gentoo.org> dev-cpp/xsimd/Manifest | 1 - ...md-13.0.0-detection-simd-with-mitigations.patch | 148 --------------------- dev-cpp/xsimd/files/xsimd-13.0.0-sve-rvv.patch | 88 ------------ dev-cpp/xsimd/xsimd-13.1.0.ebuild | 72 ---------- 4 files changed, 309 deletions(-) diff --git a/dev-cpp/xsimd/Manifest b/dev-cpp/xsimd/Manifest index 8044abc7d00b..1d9c2dcd2338 100644 --- a/dev-cpp/xsimd/Manifest +++ b/dev-cpp/xsimd/Manifest @@ -1,2 +1 @@ -DIST xsimd-13.1.0.tar.gz 265436 BLAKE2B 1c15612a280a237c730dce363cef5ca6b65625807cf22d2589fe2d50470e07a0877c12a52f769030dffbfadfa8e7f0d51c7c34fd679c01e14121c3d9c2582792 SHA512 a446aa29364c12785b9fc600341cd21b8fcf3cff6e07f6093b5cd3669a0c26397ccd75f0504c52da7f1843e2844e8b909bebbe1e64f0f2d8355f0ee0eadf1263 DIST xsimd-13.2.0.tar.gz 269287 BLAKE2B 596d348e32cd6cde6112d7dee304d44111db755eb5827c6c55a57c2803a65956ef4660784748c6f127c28c80c62689d9956363bbc49ef9d2edf5f1f8b428af55 SHA512 3825626547b0dd9b58f306bc89e9b3bc6dd778ad3811b7828e50fc16ae102574255b53f2b0714995de2bd6f9eb7b2c5d266a1a24fbfdf5420dc5e94d7dcbb522 diff --git a/dev-cpp/xsimd/files/xsimd-13.0.0-detection-simd-with-mitigations.patch b/dev-cpp/xsimd/files/xsimd-13.0.0-detection-simd-with-mitigations.patch deleted file mode 100644 index 6aab22cd8416..000000000000 --- a/dev-cpp/xsimd/files/xsimd-13.0.0-detection-simd-with-mitigations.patch +++ /dev/null @@ -1,148 +0,0 @@ -https://mail.kde.org/pipermail/distributions/2024-July/001511.html -https://github.com/xtensor-stack/xsimd/commit/96edf0340492fa9c080f5182b38358ca85baef5e - -From 96edf0340492fa9c080f5182b38358ca85baef5e Mon Sep 17 00:00:00 2001 -From: Dmitry Kazakov <[email protected]> -Date: Tue, 28 May 2024 22:21:08 +0200 -Subject: [PATCH] Fix detection of SSE/AVX/AVX512 when they are explicitly - disabled by OS - -Some CPU vulnerability mitigations may disable AVX functionality -on the hardware level via the XCR0 register. We should check that -manually to verify that OS actually allows us to use this feature. - -See https://bugs.kde.org/show_bug.cgi?id=484622 - -Fix #1025 ---- - include/xsimd/config/xsimd_cpuid.hpp | 91 ++++++++++++++++++++++------ - 1 file changed, 72 insertions(+), 19 deletions(-) - -diff --git a/include/xsimd/config/xsimd_cpuid.hpp b/include/xsimd/config/xsimd_cpuid.hpp -index f22089bac..6dda3be09 100644 ---- a/include/xsimd/config/xsimd_cpuid.hpp -+++ b/include/xsimd/config/xsimd_cpuid.hpp -@@ -114,6 +114,35 @@ namespace xsimd - #endif - - #elif defined(__x86_64__) || defined(__i386__) || defined(_M_AMD64) || defined(_M_IX86) -+ -+ auto get_xcr0_low = []() noexcept -+ { -+ uint32_t xcr0; -+ -+#if defined(_MSC_VER) && _MSC_VER >= 1400 -+ -+ xcr0 = (uint32_t)_xgetbv(0); -+ -+#elif defined(__GNUC__) -+ -+ __asm__( -+ "xorl %%ecx, %%ecx\n" -+ "xgetbv\n" -+ : "=a"(xcr0) -+ : -+#if defined(__i386__) -+ : "ecx", "edx" -+#else -+ : "rcx", "rdx" -+#endif -+ ); -+ -+#else /* _MSC_VER < 1400 */ -+#error "_MSC_VER < 1400 is not supported" -+#endif /* _MSC_VER && _MSC_VER >= 1400 */ -+ return xcr0; -+ }; -+ - auto get_cpuid = [](int reg[4], int level, int count = 0) noexcept - { - -@@ -148,19 +177,43 @@ namespace xsimd - - get_cpuid(regs1, 0x1); - -- sse2 = regs1[3] >> 26 & 1; -- sse3 = regs1[2] >> 0 & 1; -- ssse3 = regs1[2] >> 9 & 1; -- sse4_1 = regs1[2] >> 19 & 1; -- sse4_2 = regs1[2] >> 20 & 1; -- fma3_sse42 = regs1[2] >> 12 & 1; -+ // OS can explicitly disable the usage of SSE/AVX extensions -+ // by setting an appropriate flag in CR0 register -+ // -+ // https://docs.kernel.org/admin-guide/hw-vuln/gather_data_sampling.html -+ -+ unsigned sse_state_os_enabled = 1; -+ unsigned avx_state_os_enabled = 1; -+ unsigned avx512_state_os_enabled = 1; -+ -+ // OSXSAVE: A value of 1 indicates that the OS has set CR4.OSXSAVE[bit -+ // 18] to enable XSETBV/XGETBV instructions to access XCR0 and -+ // to support processor extended state management using -+ // XSAVE/XRSTOR. -+ bool osxsave = regs1[2] >> 27 & 1; -+ if (osxsave) -+ { -+ -+ uint32_t xcr0 = get_xcr0_low(); -+ -+ sse_state_os_enabled = xcr0 >> 1 & 1; -+ avx_state_os_enabled = xcr0 >> 2 & sse_state_os_enabled; -+ avx512_state_os_enabled = xcr0 >> 6 & avx_state_os_enabled; -+ } -+ -+ sse2 = regs1[3] >> 26 & sse_state_os_enabled; -+ sse3 = regs1[2] >> 0 & sse_state_os_enabled; -+ ssse3 = regs1[2] >> 9 & sse_state_os_enabled; -+ sse4_1 = regs1[2] >> 19 & sse_state_os_enabled; -+ sse4_2 = regs1[2] >> 20 & sse_state_os_enabled; -+ fma3_sse42 = regs1[2] >> 12 & sse_state_os_enabled; - -- avx = regs1[2] >> 28 & 1; -+ avx = regs1[2] >> 28 & avx_state_os_enabled; - fma3_avx = avx && fma3_sse42; - - int regs8[4]; - get_cpuid(regs8, 0x80000001); -- fma4 = regs8[2] >> 16 & 1; -+ fma4 = regs8[2] >> 16 & avx_state_os_enabled; - - // sse4a = regs[2] >> 6 & 1; - -@@ -168,23 +221,23 @@ namespace xsimd - - int regs7[4]; - get_cpuid(regs7, 0x7); -- avx2 = regs7[1] >> 5 & 1; -+ avx2 = regs7[1] >> 5 & avx_state_os_enabled; - - int regs7a[4]; - get_cpuid(regs7a, 0x7, 0x1); -- avxvnni = regs7a[0] >> 4 & 1; -+ avxvnni = regs7a[0] >> 4 & avx_state_os_enabled; - - fma3_avx2 = avx2 && fma3_sse42; - -- avx512f = regs7[1] >> 16 & 1; -- avx512cd = regs7[1] >> 28 & 1; -- avx512dq = regs7[1] >> 17 & 1; -- avx512bw = regs7[1] >> 30 & 1; -- avx512er = regs7[1] >> 27 & 1; -- avx512pf = regs7[1] >> 26 & 1; -- avx512ifma = regs7[1] >> 21 & 1; -- avx512vbmi = regs7[2] >> 1 & 1; -- avx512vnni_bw = regs7[2] >> 11 & 1; -+ avx512f = regs7[1] >> 16 & avx512_state_os_enabled; -+ avx512cd = regs7[1] >> 28 & avx512_state_os_enabled; -+ avx512dq = regs7[1] >> 17 & avx512_state_os_enabled; -+ avx512bw = regs7[1] >> 30 & avx512_state_os_enabled; -+ avx512er = regs7[1] >> 27 & avx512_state_os_enabled; -+ avx512pf = regs7[1] >> 26 & avx512_state_os_enabled; -+ avx512ifma = regs7[1] >> 21 & avx512_state_os_enabled; -+ avx512vbmi = regs7[2] >> 1 & avx512_state_os_enabled; -+ avx512vnni_bw = regs7[2] >> 11 & avx512_state_os_enabled; - avx512vnni_vbmi = avx512vbmi && avx512vnni_bw; - #endif - } - diff --git a/dev-cpp/xsimd/files/xsimd-13.0.0-sve-rvv.patch b/dev-cpp/xsimd/files/xsimd-13.0.0-sve-rvv.patch deleted file mode 100644 index 38ea56d1baa2..000000000000 --- a/dev-cpp/xsimd/files/xsimd-13.0.0-sve-rvv.patch +++ /dev/null @@ -1,88 +0,0 @@ -https://mail.kde.org/pipermail/distributions/2024-July/001511.html -https://github.com/xtensor-stack/xsimd/commit/80a59235e3ffa51659aaa06f002bfd088b77023c - -From 80a59235e3ffa51659aaa06f002bfd088b77023c Mon Sep 17 00:00:00 2001 -From: Dmitry Kazakov <[email protected]> -Date: Fri, 14 Jun 2024 10:19:55 +0200 -Subject: [PATCH] Fix xsimd::available_architectures().has() for sve and rvv - archs - -Ideally the patch CPU detection code should also check if the length -of SVE and RVV is actually supported by the current CPU implementation -(i.e. ZCR_Elx.LEN register for SVE and something else for RVV), but -I don't have such CPUs/emulators handy, so I cannot add such checks. - -Given that xsimd::available_architectures().has() is a new feature -of XSIMD13 and the length check has never been present in XSIMD, this -bug is not a regression at least. - -The patch also adds a unittest that reproduces the error the patch fixes ---- - include/xsimd/config/xsimd_cpuid.hpp | 12 ++++++++++-- - test/test_arch.cpp | 15 +++++++++++++++ - 2 files changed, 25 insertions(+), 2 deletions(-) - -diff --git a/include/xsimd/config/xsimd_cpuid.hpp b/include/xsimd/config/xsimd_cpuid.hpp -index 6dda3be09..8021fceb8 100644 ---- a/include/xsimd/config/xsimd_cpuid.hpp -+++ b/include/xsimd/config/xsimd_cpuid.hpp -@@ -42,6 +42,10 @@ namespace xsimd - #define ARCH_FIELD_EX(arch, field_name) \ - unsigned field_name; \ - XSIMD_INLINE bool has(::xsimd::arch) const { return this->field_name; } -+ -+#define ARCH_FIELD_EX_REUSE(arch, field_name) \ -+ XSIMD_INLINE bool has(::xsimd::arch) const { return this->field_name; } -+ - #define ARCH_FIELD(name) ARCH_FIELD_EX(name, name) - - ARCH_FIELD(sse2) -@@ -72,8 +76,12 @@ namespace xsimd - ARCH_FIELD(neon) - ARCH_FIELD(neon64) - ARCH_FIELD_EX(i8mm<::xsimd::neon64>, i8mm_neon64) -- ARCH_FIELD(sve) -- ARCH_FIELD(rvv) -+ ARCH_FIELD_EX(detail::sve<512>, sve) -+ ARCH_FIELD_EX_REUSE(detail::sve<256>, sve) -+ ARCH_FIELD_EX_REUSE(detail::sve<128>, sve) -+ ARCH_FIELD_EX(detail::rvv<512>, rvv) -+ ARCH_FIELD_EX_REUSE(detail::rvv<256>, rvv) -+ ARCH_FIELD_EX_REUSE(detail::rvv<128>, rvv) - ARCH_FIELD(wasm) - - #undef ARCH_FIELD -diff --git a/test/test_arch.cpp b/test/test_arch.cpp -index b42073358..f1f50d546 100644 ---- a/test/test_arch.cpp -+++ b/test/test_arch.cpp -@@ -38,6 +38,16 @@ struct check_supported - } - }; - -+struct check_cpu_has_intruction_set -+{ -+ template <class Arch> -+ void operator()(Arch arch) const -+ { -+ static_assert(std::is_same<decltype(xsimd::available_architectures().has(arch)), bool>::value, -+ "cannot test instruction set availability on CPU"); -+ } -+}; -+ - struct check_available - { - template <class Arch> -@@ -71,6 +81,11 @@ TEST_CASE("[multi arch support]") - xsimd::supported_architectures::for_each(check_supported {}); - } - -+ SUBCASE("xsimd::available_architectures::has") -+ { -+ xsimd::all_architectures::for_each(check_cpu_has_intruction_set {}); -+ } -+ - SUBCASE("xsimd::default_arch::name") - { - constexpr char const* name = xsimd::default_arch::name(); - diff --git a/dev-cpp/xsimd/xsimd-13.1.0.ebuild b/dev-cpp/xsimd/xsimd-13.1.0.ebuild deleted file mode 100644 index 8695fd2723e9..000000000000 --- a/dev-cpp/xsimd/xsimd-13.1.0.ebuild +++ /dev/null @@ -1,72 +0,0 @@ -# Copyright 2023-2025 Gentoo Authors -# Distributed under the terms of the GNU General Public License v2 - -EAPI=8 - -PYTHON_COMPAT=( python3_{10..13} ) -inherit cmake python-any-r1 - -DESCRIPTION="C++ wrappers for SIMD intrinsics" -HOMEPAGE="https://github.com/xtensor-stack/xsimd"; -SRC_URI="https://github.com/xtensor-stack/${PN}/archive/refs/tags/${PV}.tar.gz - -> ${P}.tar.gz" - -LICENSE="BSD" -SLOT="0" -KEYWORDS="amd64 arm arm64 ~hppa ~loong ~ppc ppc64 ~riscv ~s390 ~sparc x86" -IUSE="doc test" -RESTRICT="!test? ( test )" - -BDEPEND=" - doc? ( - app-text/doxygen - $(python_gen_any_dep ' - dev-python/breathe[${PYTHON_USEDEP}] - dev-python/sphinx[${PYTHON_USEDEP}] - dev-python/sphinx-rtd-theme[${PYTHON_USEDEP}] - ') - ) - test? ( dev-cpp/doctest )" - -PATCHES=( - "${FILESDIR}"/${PN}-11.1.0-c++17.patch - "${FILESDIR}"/${PN}-12.1.1-no-march.patch -) - -python_check_deps() { - python_has_version "dev-python/sphinx[${PYTHON_USEDEP}]" && - python_has_version "dev-python/sphinx-rtd-theme[${PYTHON_USEDEP}]" && - python_has_version "dev-python/breathe[${PYTHON_USEDEP}]" - -} - -pkg_setup() { - use doc && python-any-r1_pkg_setup -} - -src_prepare() { - sed -i \ - -e '/fPIC/d' \ - test/CMakeLists.txt \ - || die - cmake_src_prepare -} - -src_configure() { - local mycmakeargs=( - -DBUILD_TESTS=$(usex test) - ) - cmake_src_configure -} - -src_compile() { - cmake_src_compile - use doc && emake -C docs html -} - -src_install() { - cmake_src_install - if use doc; then - dodoc -r docs/build/html - fi -}
