commit: 34ba35b4d9b9fad11c0d783b3d2282d1886e90c7 Author: Sam James <sam <AT> gentoo <DOT> org> AuthorDate: Sat Aug 30 08:04:59 2025 +0000 Commit: Sam James <sam <AT> gentoo <DOT> org> CommitDate: Sat Aug 30 08:04:59 2025 +0000 URL: https://gitweb.gentoo.org/proj/gcc-patches.git/commit/?id=34ba35b4
16.0.0: switch to submitted Mesa patch Functionally the same. Signed-off-by: Sam James <sam <AT> gentoo.org> 16.0.0/gentoo/91_all_PR121699-mesa.patch | 89 +++++++++++++++++++++++++++++--- 1 file changed, 82 insertions(+), 7 deletions(-) diff --git a/16.0.0/gentoo/91_all_PR121699-mesa.patch b/16.0.0/gentoo/91_all_PR121699-mesa.patch index 977aeda..09f8bcc 100644 --- a/16.0.0/gentoo/91_all_PR121699-mesa.patch +++ b/16.0.0/gentoo/91_all_PR121699-mesa.patch @@ -1,10 +1,43 @@ - 1) Fix predicate of operands[3] in cond_<insn><mode> since only - const_vec_dup_operand is excepted for masked operations, and pass real - count to ix86_vgf2p8affine_shift_matrix. +From 2a9fff30d30b591bce9ce43710bfb5426a9b193d Mon Sep 17 00:00:00 2001 +Message-ID: <2a9fff30d30b591bce9ce43710bfb5426a9b193d.1756541078.git....@gentoo.org> +From: liuhongt <[email protected]> +Date: Sat, 30 Aug 2025 00:59:30 -0700 +Subject: [PATCH] Fix ICE due to wrong operand is passed to + ix86_vgf2p8affine_shift_matrix. - 2) Pass operands[2] instead of operands[1] to - gen_vgf2p8affineqb_<mode>_mask which excepted the operand to shifted, - but operands[1] is mask operand in cond_<insn><mode>. +1) Fix predicate of operands[3] in cond_<insn><mode> since only +const_vec_dup_operand is excepted for masked operations, and pass real +count to ix86_vgf2p8affine_shift_matrix. + +2) Pass operands[2] instead of operands[1] to +gen_vgf2p8affineqb_<mode>_mask which excepted the operand to shifted, +but operands[1] is mask operand in cond_<insn><mode>. + +Bootstrapped and regtested on x86_64-pc-linux-gnu{-m32,}. +Ready push to trunk. + +gcc/ChangeLog: + + PR target/121699 + * config/i386/predicates.md (const_vec_dup_operand): New + predicate. + * config/i386/sse.md (cond_<insn><mode>): Fix predicate of + operands[3], and fix wrong operands passed to + ix86_vgf2p8affine_shift_matrix and + gen_vgf2p8affineqb_<mode>_mask. + +gcc/testsuite/ChangeLog: + +* gcc.target/i386/pr121699.c: New test. +--- + gcc/config/i386/predicates.md | 3 +++ + gcc/config/i386/sse.md | 8 ++++---- + gcc/testsuite/gcc.target/i386/pr121699.c | 23 +++++++++++++++++++++++ + 3 files changed, 30 insertions(+), 4 deletions(-) + create mode 100644 gcc/testsuite/gcc.target/i386/pr121699.c + +diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md +index 175798cff69b..5dbe444847fd 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -1319,6 +1319,9 @@ (define_predicate "nonimmediate_or_const_vec_dup_operand" @@ -17,9 +50,17 @@ ;; Return true when OP is either register operand, or any ;; CONST_VECTOR. (define_predicate "reg_or_const_vector_operand" +diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md +index 505095040f75..73906b85d899 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md -@@ -27007,13 +27007,14 @@ (define_expand "cond_<insn><mode>" +@@ -27001,19 +27001,19 @@ (define_expand "<insn><mode>3" + DONE; + }) + +-; not generated by vectorizer? + (define_expand "cond_<insn><mode>" + [(set (match_operand:VI1_AVX512VL 0 "register_operand") (vec_merge:VI1_AVX512VL (any_shift:VI1_AVX512VL (match_operand:VI1_AVX512VL 2 "register_operand") @@ -37,3 +78,37 @@ const0_rtx, operands[4], operands[1])); DONE; +diff --git a/gcc/testsuite/gcc.target/i386/pr121699.c b/gcc/testsuite/gcc.target/i386/pr121699.c +new file mode 100644 +index 000000000000..80c1404bebed +--- /dev/null ++++ b/gcc/testsuite/gcc.target/i386/pr121699.c +@@ -0,0 +1,23 @@ ++/* { dg-do compile } */ ++/* { dg-options "-march=znver4 -O3" } */ ++ ++typedef struct ++{ ++ int u32; ++} nir_const_value; ++ ++nir_const_value *evaluate_prmt_nv__dst_val; ++ ++int evaluate_prmt_nv__src_0, evaluate_prmt_nv_src; ++ ++void ++evaluate_prmt_nv (unsigned num_components) ++{ ++ for (unsigned _i = 0; _i < num_components; _i++) ++ { ++ char x = evaluate_prmt_nv_src; ++ if (evaluate_prmt_nv__src_0) ++ x = x >> 7; ++ evaluate_prmt_nv__dst_val[_i].u32 = x; ++ } ++} + +base-commit: bfa70ddb650ec91c2511d351b2b3c3f78dfad6d4 +-- +2.51.0 +
