commit: b7a956ed5e89120b44bc650839ba1786c163941e Author: Sam James <sam <AT> gentoo <DOT> org> AuthorDate: Sat Jul 19 08:43:54 2025 +0000 Commit: Sam James <sam <AT> gentoo <DOT> org> CommitDate: Sat Jul 19 11:35:14 2025 +0000 URL: https://gitweb.gentoo.org/repo/gentoo.git/commit/?id=b7a956ed
profiles/base: don't force-enable all LLVM targets LLVM continues to grow, so building all targets consumes evermore disk space at build-time (and once installed) as well as time to compile. With llvm-core/lld now worked around, we shouldn't need this anymore. If other consumers are using InitializeAllTargets, they should use llvm.org.eclass's LLVM_USE_TARGETS=llvm+eq. Bug: https://bugs.gentoo.org/767700 Bug: https://bugs.gentoo.org/768267 Signed-off-by: Sam James <sam <AT> gentoo.org> profiles/base/package.use.force | 96 ----------------------------------------- 1 file changed, 96 deletions(-) diff --git a/profiles/base/package.use.force b/profiles/base/package.use.force index 2d1b08f7ddee..5b29f3b5e39a 100644 --- a/profiles/base/package.use.force +++ b/profiles/base/package.use.force @@ -193,102 +193,6 @@ dev-java/openjdk:11 system-bootstrap dev-java/openjdk:17 system-bootstrap dev-java/openjdk:21 system-bootstrap -# Michał Górny <[email protected]> (2021-11-04) -# Enable all LLVM targets unconditionally. Unfortunately, disabling -# targets tend to break reverse dependencies (e.g. Rust) and we are yet -# to find a clean way of resolving that. Compared to the damage -# potential, the increase of build time is a minor problem. Users who -# really insist of building a smaller system can un-force the flags -# at their own responsibility. See bug #767700. ->=llvm-core/clang-13.0.1_rc llvm_targets_AArch64 llvm_targets_AMDGPU ->=llvm-core/clang-13.0.1_rc llvm_targets_ARM llvm_targets_AVR llvm_targets_BPF ->=llvm-core/clang-13.0.1_rc llvm_targets_Hexagon llvm_targets_Lanai ->=llvm-core/clang-13.0.1_rc llvm_targets_MSP430 llvm_targets_Mips ->=llvm-core/clang-13.0.1_rc llvm_targets_NVPTX llvm_targets_PowerPC ->=llvm-core/clang-13.0.1_rc llvm_targets_RISCV llvm_targets_Sparc ->=llvm-core/clang-13.0.1_rc llvm_targets_SystemZ llvm_targets_WebAssembly ->=llvm-core/clang-13.0.1_rc llvm_targets_X86 llvm_targets_XCore ->=llvm-core/clang-14 llvm_targets_VE ->=llvm-core/clang-16 llvm_targets_LoongArch ->=llvm-core/clang-20 llvm_targets_SPIRV ->=llvm-core/llvm-13.0.1_rc llvm_targets_AArch64 llvm_targets_AMDGPU ->=llvm-core/llvm-13.0.1_rc llvm_targets_ARM llvm_targets_AVR llvm_targets_BPF ->=llvm-core/llvm-13.0.1_rc llvm_targets_Hexagon llvm_targets_Lanai ->=llvm-core/llvm-13.0.1_rc llvm_targets_MSP430 llvm_targets_Mips ->=llvm-core/llvm-13.0.1_rc llvm_targets_NVPTX llvm_targets_PowerPC ->=llvm-core/llvm-13.0.1_rc llvm_targets_RISCV llvm_targets_Sparc ->=llvm-core/llvm-13.0.1_rc llvm_targets_SystemZ llvm_targets_WebAssembly ->=llvm-core/llvm-13.0.1_rc llvm_targets_X86 llvm_targets_XCore ->=llvm-core/llvm-14 llvm_targets_VE ->=llvm-core/llvm-16 llvm_targets_LoongArch ->=llvm-core/llvm-20 llvm_targets_SPIRV ->=llvm-core/lld-13.0.1_rc llvm_targets_AArch64 llvm_targets_AMDGPU ->=llvm-core/lld-13.0.1_rc llvm_targets_ARM llvm_targets_AVR llvm_targets_BPF ->=llvm-core/lld-13.0.1_rc llvm_targets_Hexagon llvm_targets_Lanai ->=llvm-core/lld-13.0.1_rc llvm_targets_MSP430 llvm_targets_Mips ->=llvm-core/lld-13.0.1_rc llvm_targets_NVPTX llvm_targets_PowerPC ->=llvm-core/lld-13.0.1_rc llvm_targets_RISCV llvm_targets_Sparc ->=llvm-core/lld-13.0.1_rc llvm_targets_SystemZ llvm_targets_WebAssembly ->=llvm-core/lld-13.0.1_rc llvm_targets_X86 llvm_targets_XCore ->=llvm-core/lld-14 llvm_targets_VE ->=llvm-core/lld-16 llvm_targets_LoongArch ->=llvm-core/lld-20 llvm_targets_SPIRV ->=llvm-core/lld-13.0.1_rc llvm_targets_AArch64 llvm_targets_AMDGPU ->=llvm-core/lld-13.0.1_rc llvm_targets_ARM llvm_targets_AVR llvm_targets_BPF ->=llvm-core/lld-13.0.1_rc llvm_targets_Hexagon llvm_targets_Lanai ->=llvm-core/lld-13.0.1_rc llvm_targets_MSP430 llvm_targets_Mips ->=llvm-core/lld-13.0.1_rc llvm_targets_NVPTX llvm_targets_PowerPC ->=llvm-core/lld-13.0.1_rc llvm_targets_RISCV llvm_targets_Sparc ->=llvm-core/lld-13.0.1_rc llvm_targets_SystemZ llvm_targets_WebAssembly ->=llvm-core/lld-13.0.1_rc llvm_targets_X86 llvm_targets_XCore ->=llvm-core/lld-14 llvm_targets_VE ->=llvm-core/lld-16 llvm_targets_LoongArch ->=llvm-core/lld-20 llvm_targets_SPIRV ->=llvm-core/flang-13.0.1_rc llvm_targets_AArch64 llvm_targets_AMDGPU ->=llvm-core/flang-13.0.1_rc llvm_targets_ARM llvm_targets_AVR llvm_targets_BPF ->=llvm-core/flang-13.0.1_rc llvm_targets_Hexagon llvm_targets_Lanai ->=llvm-core/flang-13.0.1_rc llvm_targets_MSP430 llvm_targets_Mips ->=llvm-core/flang-13.0.1_rc llvm_targets_NVPTX llvm_targets_PowerPC ->=llvm-core/flang-13.0.1_rc llvm_targets_RISCV llvm_targets_Sparc ->=llvm-core/flang-13.0.1_rc llvm_targets_SystemZ llvm_targets_WebAssembly ->=llvm-core/flang-13.0.1_rc llvm_targets_X86 llvm_targets_XCore ->=llvm-core/flang-14 llvm_targets_VE ->=llvm-core/flang-16 llvm_targets_LoongArch ->=llvm-core/flang-20 llvm_targets_SPIRV ->=llvm-core/lldb-13.0.1_rc llvm_targets_AArch64 llvm_targets_AMDGPU ->=llvm-core/lldb-13.0.1_rc llvm_targets_ARM llvm_targets_AVR llvm_targets_BPF ->=llvm-core/lldb-13.0.1_rc llvm_targets_Hexagon llvm_targets_Lanai ->=llvm-core/lldb-13.0.1_rc llvm_targets_MSP430 llvm_targets_Mips ->=llvm-core/lldb-13.0.1_rc llvm_targets_NVPTX llvm_targets_PowerPC ->=llvm-core/lldb-13.0.1_rc llvm_targets_RISCV llvm_targets_Sparc ->=llvm-core/lldb-13.0.1_rc llvm_targets_SystemZ llvm_targets_WebAssembly ->=llvm-core/lldb-13.0.1_rc llvm_targets_X86 llvm_targets_XCore ->=llvm-core/lldb-14 llvm_targets_VE ->=llvm-core/lldb-16 llvm_targets_LoongArch ->=llvm-core/lldb-20 llvm_targets_SPIRV ->=llvm-core/lldb-13.0.1_rc llvm_targets_AArch64 llvm_targets_AMDGPU ->=llvm-core/lldb-13.0.1_rc llvm_targets_ARM llvm_targets_AVR llvm_targets_BPF ->=llvm-core/lldb-13.0.1_rc llvm_targets_Hexagon llvm_targets_Lanai ->=llvm-core/lldb-13.0.1_rc llvm_targets_MSP430 llvm_targets_Mips ->=llvm-core/lldb-13.0.1_rc llvm_targets_NVPTX llvm_targets_PowerPC ->=llvm-core/lldb-13.0.1_rc llvm_targets_RISCV llvm_targets_Sparc ->=llvm-core/lldb-13.0.1_rc llvm_targets_SystemZ llvm_targets_WebAssembly ->=llvm-core/lldb-13.0.1_rc llvm_targets_X86 llvm_targets_XCore ->=llvm-core/lldb-14 llvm_targets_VE ->=llvm-core/lldb-16 llvm_targets_LoongArch ->=llvm-core/lldb-20 llvm_targets_SPIRV ->=llvm-core/lldb-13.0.1_rc llvm_targets_AArch64 llvm_targets_AMDGPU ->=llvm-core/lldb-13.0.1_rc llvm_targets_ARM llvm_targets_AVR llvm_targets_BPF ->=llvm-core/lldb-13.0.1_rc llvm_targets_Hexagon llvm_targets_Lanai ->=llvm-core/lldb-13.0.1_rc llvm_targets_MSP430 llvm_targets_Mips ->=llvm-core/lldb-13.0.1_rc llvm_targets_NVPTX llvm_targets_PowerPC ->=llvm-core/lldb-13.0.1_rc llvm_targets_RISCV llvm_targets_Sparc ->=llvm-core/lldb-13.0.1_rc llvm_targets_SystemZ llvm_targets_WebAssembly ->=llvm-core/lldb-13.0.1_rc llvm_targets_X86 llvm_targets_XCore ->=llvm-core/lldb-14 llvm_targets_VE ->=llvm-core/lldb-16 llvm_targets_LoongArch ->=llvm-core/lldb-20 llvm_targets_SPIRV - # Andreas K. Hüttel <[email protected]> (2021-07-14) # Upstream plans to drop libcrypt.so.1/crypt.h from glibc # distribution and rely on external providers like libxcrypt.
