commit: c45fa4419fce16c5dc081016501128ab834008b6 Author: Mike Pagano <mpagano <AT> gentoo <DOT> org> AuthorDate: Wed Jun 4 18:07:12 2025 +0000 Commit: Mike Pagano <mpagano <AT> gentoo <DOT> org> CommitDate: Wed Jun 4 18:07:12 2025 +0000 URL: https://gitweb.gentoo.org/proj/linux-patches.git/commit/?id=c45fa441
Linux patch 6.15.1 Signed-off-by: Mike Pagano <mpagano <AT> gentoo.org> 0000_README | 4 + 1000_linux-6.15.1.patch | 2184 +++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 2188 insertions(+) diff --git a/0000_README b/0000_README index 057bf40b..61b05f13 100644 --- a/0000_README +++ b/0000_README @@ -42,6 +42,10 @@ EXPERIMENTAL Individual Patch Descriptions: -------------------------------------------------------------------------- +Patch: 1000_linux-6.15.1.patch +From: https://www.kernel.org +Desc: Linux 6.15.1 + Patch: 1510_fs-enable-link-security-restrictions-by-default.patch From: http://sources.debian.net/src/linux/3.16.7-ckt4-3/debian/patches/debian/fs-enable-link-security-restrictions-by-default.patch/ Desc: Enable link security restrictions by default. diff --git a/1000_linux-6.15.1.patch b/1000_linux-6.15.1.patch new file mode 100644 index 00000000..2ad8a361 --- /dev/null +++ b/1000_linux-6.15.1.patch @@ -0,0 +1,2184 @@ +diff --git a/Makefile b/Makefile +index c1cd1b5fc269a6..61d69a3fc827cc 100644 +--- a/Makefile ++++ b/Makefile +@@ -1,7 +1,7 @@ + # SPDX-License-Identifier: GPL-2.0 + VERSION = 6 + PATCHLEVEL = 15 +-SUBLEVEL = 0 ++SUBLEVEL = 1 + EXTRAVERSION = + NAME = Baby Opossum Posse + +diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi +index 51c6e19e40b843..7d9394a0430272 100644 +--- a/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi ++++ b/arch/arm64/boot/dts/intel/socfpga_agilex5.dtsi +@@ -222,9 +222,9 @@ i3c1: i3c@10da1000 { + status = "disabled"; + }; + +- gpio0: gpio@ffc03200 { ++ gpio0: gpio@10c03200 { + compatible = "snps,dw-apb-gpio"; +- reg = <0xffc03200 0x100>; ++ reg = <0x10c03200 0x100>; + #address-cells = <1>; + #size-cells = <0>; + resets = <&rst GPIO0_RESET>; +diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi +index 94229002897257..3c02351fbb156a 100644 +--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi ++++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi +@@ -378,6 +378,8 @@ cryptobam: dma-controller@704000 { + interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + qcom,ee = <1>; ++ qcom,num-ees = <4>; ++ num-channels = <16>; + qcom,controlled-remotely; + }; + +diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi +index 3394ae2d130034..2329460b210381 100644 +--- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi ++++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi +@@ -2413,6 +2413,8 @@ cryptobam: dma-controller@1dc4000 { + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + qcom,ee = <0>; ++ qcom,num-ees = <4>; ++ num-channels = <20>; + qcom,controlled-remotely; + iommus = <&apps_smmu 0x480 0x00>, + <&apps_smmu 0x481 0x00>; +@@ -4903,15 +4905,7 @@ compute-cb@1 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <1>; + iommus = <&apps_smmu 0x2141 0x04a0>, +- <&apps_smmu 0x2161 0x04a0>, +- <&apps_smmu 0x2181 0x0400>, +- <&apps_smmu 0x21c1 0x04a0>, +- <&apps_smmu 0x21e1 0x04a0>, +- <&apps_smmu 0x2541 0x04a0>, +- <&apps_smmu 0x2561 0x04a0>, +- <&apps_smmu 0x2581 0x0400>, +- <&apps_smmu 0x25c1 0x04a0>, +- <&apps_smmu 0x25e1 0x04a0>; ++ <&apps_smmu 0x2181 0x0400>; + dma-coherent; + }; + +@@ -4919,15 +4913,7 @@ compute-cb@2 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <2>; + iommus = <&apps_smmu 0x2142 0x04a0>, +- <&apps_smmu 0x2162 0x04a0>, +- <&apps_smmu 0x2182 0x0400>, +- <&apps_smmu 0x21c2 0x04a0>, +- <&apps_smmu 0x21e2 0x04a0>, +- <&apps_smmu 0x2542 0x04a0>, +- <&apps_smmu 0x2562 0x04a0>, +- <&apps_smmu 0x2582 0x0400>, +- <&apps_smmu 0x25c2 0x04a0>, +- <&apps_smmu 0x25e2 0x04a0>; ++ <&apps_smmu 0x2182 0x0400>; + dma-coherent; + }; + +@@ -4935,15 +4921,7 @@ compute-cb@3 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <3>; + iommus = <&apps_smmu 0x2143 0x04a0>, +- <&apps_smmu 0x2163 0x04a0>, +- <&apps_smmu 0x2183 0x0400>, +- <&apps_smmu 0x21c3 0x04a0>, +- <&apps_smmu 0x21e3 0x04a0>, +- <&apps_smmu 0x2543 0x04a0>, +- <&apps_smmu 0x2563 0x04a0>, +- <&apps_smmu 0x2583 0x0400>, +- <&apps_smmu 0x25c3 0x04a0>, +- <&apps_smmu 0x25e3 0x04a0>; ++ <&apps_smmu 0x2183 0x0400>; + dma-coherent; + }; + +@@ -4951,15 +4929,7 @@ compute-cb@4 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <4>; + iommus = <&apps_smmu 0x2144 0x04a0>, +- <&apps_smmu 0x2164 0x04a0>, +- <&apps_smmu 0x2184 0x0400>, +- <&apps_smmu 0x21c4 0x04a0>, +- <&apps_smmu 0x21e4 0x04a0>, +- <&apps_smmu 0x2544 0x04a0>, +- <&apps_smmu 0x2564 0x04a0>, +- <&apps_smmu 0x2584 0x0400>, +- <&apps_smmu 0x25c4 0x04a0>, +- <&apps_smmu 0x25e4 0x04a0>; ++ <&apps_smmu 0x2184 0x0400>; + dma-coherent; + }; + +@@ -4967,15 +4937,7 @@ compute-cb@5 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <5>; + iommus = <&apps_smmu 0x2145 0x04a0>, +- <&apps_smmu 0x2165 0x04a0>, +- <&apps_smmu 0x2185 0x0400>, +- <&apps_smmu 0x21c5 0x04a0>, +- <&apps_smmu 0x21e5 0x04a0>, +- <&apps_smmu 0x2545 0x04a0>, +- <&apps_smmu 0x2565 0x04a0>, +- <&apps_smmu 0x2585 0x0400>, +- <&apps_smmu 0x25c5 0x04a0>, +- <&apps_smmu 0x25e5 0x04a0>; ++ <&apps_smmu 0x2185 0x0400>; + dma-coherent; + }; + +@@ -4983,15 +4945,7 @@ compute-cb@6 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <6>; + iommus = <&apps_smmu 0x2146 0x04a0>, +- <&apps_smmu 0x2166 0x04a0>, +- <&apps_smmu 0x2186 0x0400>, +- <&apps_smmu 0x21c6 0x04a0>, +- <&apps_smmu 0x21e6 0x04a0>, +- <&apps_smmu 0x2546 0x04a0>, +- <&apps_smmu 0x2566 0x04a0>, +- <&apps_smmu 0x2586 0x0400>, +- <&apps_smmu 0x25c6 0x04a0>, +- <&apps_smmu 0x25e6 0x04a0>; ++ <&apps_smmu 0x2186 0x0400>; + dma-coherent; + }; + +@@ -4999,15 +4953,7 @@ compute-cb@7 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <7>; + iommus = <&apps_smmu 0x2147 0x04a0>, +- <&apps_smmu 0x2167 0x04a0>, +- <&apps_smmu 0x2187 0x0400>, +- <&apps_smmu 0x21c7 0x04a0>, +- <&apps_smmu 0x21e7 0x04a0>, +- <&apps_smmu 0x2547 0x04a0>, +- <&apps_smmu 0x2567 0x04a0>, +- <&apps_smmu 0x2587 0x0400>, +- <&apps_smmu 0x25c7 0x04a0>, +- <&apps_smmu 0x25e7 0x04a0>; ++ <&apps_smmu 0x2187 0x0400>; + dma-coherent; + }; + +@@ -5015,15 +4961,7 @@ compute-cb@8 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <8>; + iommus = <&apps_smmu 0x2148 0x04a0>, +- <&apps_smmu 0x2168 0x04a0>, +- <&apps_smmu 0x2188 0x0400>, +- <&apps_smmu 0x21c8 0x04a0>, +- <&apps_smmu 0x21e8 0x04a0>, +- <&apps_smmu 0x2548 0x04a0>, +- <&apps_smmu 0x2568 0x04a0>, +- <&apps_smmu 0x2588 0x0400>, +- <&apps_smmu 0x25c8 0x04a0>, +- <&apps_smmu 0x25e8 0x04a0>; ++ <&apps_smmu 0x2188 0x0400>; + dma-coherent; + }; + +@@ -5031,31 +4969,7 @@ compute-cb@9 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <9>; + iommus = <&apps_smmu 0x2149 0x04a0>, +- <&apps_smmu 0x2169 0x04a0>, +- <&apps_smmu 0x2189 0x0400>, +- <&apps_smmu 0x21c9 0x04a0>, +- <&apps_smmu 0x21e9 0x04a0>, +- <&apps_smmu 0x2549 0x04a0>, +- <&apps_smmu 0x2569 0x04a0>, +- <&apps_smmu 0x2589 0x0400>, +- <&apps_smmu 0x25c9 0x04a0>, +- <&apps_smmu 0x25e9 0x04a0>; +- dma-coherent; +- }; +- +- compute-cb@10 { +- compatible = "qcom,fastrpc-compute-cb"; +- reg = <10>; +- iommus = <&apps_smmu 0x214a 0x04a0>, +- <&apps_smmu 0x216a 0x04a0>, +- <&apps_smmu 0x218a 0x0400>, +- <&apps_smmu 0x21ca 0x04a0>, +- <&apps_smmu 0x21ea 0x04a0>, +- <&apps_smmu 0x254a 0x04a0>, +- <&apps_smmu 0x256a 0x04a0>, +- <&apps_smmu 0x258a 0x0400>, +- <&apps_smmu 0x25ca 0x04a0>, +- <&apps_smmu 0x25ea 0x04a0>; ++ <&apps_smmu 0x2189 0x0400>; + dma-coherent; + }; + +@@ -5063,15 +4977,7 @@ compute-cb@11 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <11>; + iommus = <&apps_smmu 0x214b 0x04a0>, +- <&apps_smmu 0x216b 0x04a0>, +- <&apps_smmu 0x218b 0x0400>, +- <&apps_smmu 0x21cb 0x04a0>, +- <&apps_smmu 0x21eb 0x04a0>, +- <&apps_smmu 0x254b 0x04a0>, +- <&apps_smmu 0x256b 0x04a0>, +- <&apps_smmu 0x258b 0x0400>, +- <&apps_smmu 0x25cb 0x04a0>, +- <&apps_smmu 0x25eb 0x04a0>; ++ <&apps_smmu 0x218b 0x0400>; + dma-coherent; + }; + }; +@@ -5131,15 +5037,7 @@ compute-cb@1 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <1>; + iommus = <&apps_smmu 0x2941 0x04a0>, +- <&apps_smmu 0x2961 0x04a0>, +- <&apps_smmu 0x2981 0x0400>, +- <&apps_smmu 0x29c1 0x04a0>, +- <&apps_smmu 0x29e1 0x04a0>, +- <&apps_smmu 0x2d41 0x04a0>, +- <&apps_smmu 0x2d61 0x04a0>, +- <&apps_smmu 0x2d81 0x0400>, +- <&apps_smmu 0x2dc1 0x04a0>, +- <&apps_smmu 0x2de1 0x04a0>; ++ <&apps_smmu 0x2981 0x0400>; + dma-coherent; + }; + +@@ -5147,15 +5045,7 @@ compute-cb@2 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <2>; + iommus = <&apps_smmu 0x2942 0x04a0>, +- <&apps_smmu 0x2962 0x04a0>, +- <&apps_smmu 0x2982 0x0400>, +- <&apps_smmu 0x29c2 0x04a0>, +- <&apps_smmu 0x29e2 0x04a0>, +- <&apps_smmu 0x2d42 0x04a0>, +- <&apps_smmu 0x2d62 0x04a0>, +- <&apps_smmu 0x2d82 0x0400>, +- <&apps_smmu 0x2dc2 0x04a0>, +- <&apps_smmu 0x2de2 0x04a0>; ++ <&apps_smmu 0x2982 0x0400>; + dma-coherent; + }; + +@@ -5163,15 +5053,7 @@ compute-cb@3 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <3>; + iommus = <&apps_smmu 0x2943 0x04a0>, +- <&apps_smmu 0x2963 0x04a0>, +- <&apps_smmu 0x2983 0x0400>, +- <&apps_smmu 0x29c3 0x04a0>, +- <&apps_smmu 0x29e3 0x04a0>, +- <&apps_smmu 0x2d43 0x04a0>, +- <&apps_smmu 0x2d63 0x04a0>, +- <&apps_smmu 0x2d83 0x0400>, +- <&apps_smmu 0x2dc3 0x04a0>, +- <&apps_smmu 0x2de3 0x04a0>; ++ <&apps_smmu 0x2983 0x0400>; + dma-coherent; + }; + +@@ -5179,15 +5061,7 @@ compute-cb@4 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <4>; + iommus = <&apps_smmu 0x2944 0x04a0>, +- <&apps_smmu 0x2964 0x04a0>, +- <&apps_smmu 0x2984 0x0400>, +- <&apps_smmu 0x29c4 0x04a0>, +- <&apps_smmu 0x29e4 0x04a0>, +- <&apps_smmu 0x2d44 0x04a0>, +- <&apps_smmu 0x2d64 0x04a0>, +- <&apps_smmu 0x2d84 0x0400>, +- <&apps_smmu 0x2dc4 0x04a0>, +- <&apps_smmu 0x2de4 0x04a0>; ++ <&apps_smmu 0x2984 0x0400>; + dma-coherent; + }; + +@@ -5195,15 +5069,7 @@ compute-cb@5 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <5>; + iommus = <&apps_smmu 0x2945 0x04a0>, +- <&apps_smmu 0x2965 0x04a0>, +- <&apps_smmu 0x2985 0x0400>, +- <&apps_smmu 0x29c5 0x04a0>, +- <&apps_smmu 0x29e5 0x04a0>, +- <&apps_smmu 0x2d45 0x04a0>, +- <&apps_smmu 0x2d65 0x04a0>, +- <&apps_smmu 0x2d85 0x0400>, +- <&apps_smmu 0x2dc5 0x04a0>, +- <&apps_smmu 0x2de5 0x04a0>; ++ <&apps_smmu 0x2985 0x0400>; + dma-coherent; + }; + +@@ -5211,15 +5077,7 @@ compute-cb@6 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <6>; + iommus = <&apps_smmu 0x2946 0x04a0>, +- <&apps_smmu 0x2966 0x04a0>, +- <&apps_smmu 0x2986 0x0400>, +- <&apps_smmu 0x29c6 0x04a0>, +- <&apps_smmu 0x29e6 0x04a0>, +- <&apps_smmu 0x2d46 0x04a0>, +- <&apps_smmu 0x2d66 0x04a0>, +- <&apps_smmu 0x2d86 0x0400>, +- <&apps_smmu 0x2dc6 0x04a0>, +- <&apps_smmu 0x2de6 0x04a0>; ++ <&apps_smmu 0x2986 0x0400>; + dma-coherent; + }; + +@@ -5227,15 +5085,7 @@ compute-cb@7 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <7>; + iommus = <&apps_smmu 0x2947 0x04a0>, +- <&apps_smmu 0x2967 0x04a0>, +- <&apps_smmu 0x2987 0x0400>, +- <&apps_smmu 0x29c7 0x04a0>, +- <&apps_smmu 0x29e7 0x04a0>, +- <&apps_smmu 0x2d47 0x04a0>, +- <&apps_smmu 0x2d67 0x04a0>, +- <&apps_smmu 0x2d87 0x0400>, +- <&apps_smmu 0x2dc7 0x04a0>, +- <&apps_smmu 0x2de7 0x04a0>; ++ <&apps_smmu 0x2987 0x0400>; + dma-coherent; + }; + +@@ -5243,15 +5093,7 @@ compute-cb@8 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <8>; + iommus = <&apps_smmu 0x2948 0x04a0>, +- <&apps_smmu 0x2968 0x04a0>, +- <&apps_smmu 0x2988 0x0400>, +- <&apps_smmu 0x29c8 0x04a0>, +- <&apps_smmu 0x29e8 0x04a0>, +- <&apps_smmu 0x2d48 0x04a0>, +- <&apps_smmu 0x2d68 0x04a0>, +- <&apps_smmu 0x2d88 0x0400>, +- <&apps_smmu 0x2dc8 0x04a0>, +- <&apps_smmu 0x2de8 0x04a0>; ++ <&apps_smmu 0x2988 0x0400>; + dma-coherent; + }; + +@@ -5259,15 +5101,7 @@ compute-cb@9 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <9>; + iommus = <&apps_smmu 0x2949 0x04a0>, +- <&apps_smmu 0x2969 0x04a0>, +- <&apps_smmu 0x2989 0x0400>, +- <&apps_smmu 0x29c9 0x04a0>, +- <&apps_smmu 0x29e9 0x04a0>, +- <&apps_smmu 0x2d49 0x04a0>, +- <&apps_smmu 0x2d69 0x04a0>, +- <&apps_smmu 0x2d89 0x0400>, +- <&apps_smmu 0x2dc9 0x04a0>, +- <&apps_smmu 0x2de9 0x04a0>; ++ <&apps_smmu 0x2989 0x0400>; + dma-coherent; + }; + +@@ -5275,15 +5109,7 @@ compute-cb@10 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <10>; + iommus = <&apps_smmu 0x294a 0x04a0>, +- <&apps_smmu 0x296a 0x04a0>, +- <&apps_smmu 0x298a 0x0400>, +- <&apps_smmu 0x29ca 0x04a0>, +- <&apps_smmu 0x29ea 0x04a0>, +- <&apps_smmu 0x2d4a 0x04a0>, +- <&apps_smmu 0x2d6a 0x04a0>, +- <&apps_smmu 0x2d8a 0x0400>, +- <&apps_smmu 0x2dca 0x04a0>, +- <&apps_smmu 0x2dea 0x04a0>; ++ <&apps_smmu 0x298a 0x0400>; + dma-coherent; + }; + +@@ -5291,15 +5117,7 @@ compute-cb@11 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <11>; + iommus = <&apps_smmu 0x294b 0x04a0>, +- <&apps_smmu 0x296b 0x04a0>, +- <&apps_smmu 0x298b 0x0400>, +- <&apps_smmu 0x29cb 0x04a0>, +- <&apps_smmu 0x29eb 0x04a0>, +- <&apps_smmu 0x2d4b 0x04a0>, +- <&apps_smmu 0x2d6b 0x04a0>, +- <&apps_smmu 0x2d8b 0x0400>, +- <&apps_smmu 0x2dcb 0x04a0>, +- <&apps_smmu 0x2deb 0x04a0>; ++ <&apps_smmu 0x298b 0x0400>; + dma-coherent; + }; + +@@ -5307,15 +5125,7 @@ compute-cb@12 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <12>; + iommus = <&apps_smmu 0x294c 0x04a0>, +- <&apps_smmu 0x296c 0x04a0>, +- <&apps_smmu 0x298c 0x0400>, +- <&apps_smmu 0x29cc 0x04a0>, +- <&apps_smmu 0x29ec 0x04a0>, +- <&apps_smmu 0x2d4c 0x04a0>, +- <&apps_smmu 0x2d6c 0x04a0>, +- <&apps_smmu 0x2d8c 0x0400>, +- <&apps_smmu 0x2dcc 0x04a0>, +- <&apps_smmu 0x2dec 0x04a0>; ++ <&apps_smmu 0x298c 0x0400>; + dma-coherent; + }; + +@@ -5323,15 +5133,7 @@ compute-cb@13 { + compatible = "qcom,fastrpc-compute-cb"; + reg = <13>; + iommus = <&apps_smmu 0x294d 0x04a0>, +- <&apps_smmu 0x296d 0x04a0>, +- <&apps_smmu 0x298d 0x0400>, +- <&apps_smmu 0x29Cd 0x04a0>, +- <&apps_smmu 0x29ed 0x04a0>, +- <&apps_smmu 0x2d4d 0x04a0>, +- <&apps_smmu 0x2d6d 0x04a0>, +- <&apps_smmu 0x2d8d 0x0400>, +- <&apps_smmu 0x2dcd 0x04a0>, +- <&apps_smmu 0x2ded 0x04a0>; ++ <&apps_smmu 0x298d 0x0400>; + dma-coherent; + }; + }; +diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi +index 69da30f35baaab..f055600d6cfe5b 100644 +--- a/arch/arm64/boot/dts/qcom/sm8350.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi +@@ -455,7 +455,7 @@ cdsp_secure_heap: memory@80c00000 { + no-map; + }; + +- pil_camera_mem: mmeory@85200000 { ++ pil_camera_mem: memory@85200000 { + reg = <0x0 0x85200000 0x0 0x500000>; + no-map; + }; +diff --git a/arch/arm64/boot/dts/qcom/sm8450.dtsi b/arch/arm64/boot/dts/qcom/sm8450.dtsi +index 9c809fc5fa45a9..419df72cd04b0c 100644 +--- a/arch/arm64/boot/dts/qcom/sm8450.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8450.dtsi +@@ -5283,6 +5283,8 @@ cryptobam: dma-controller@1dc4000 { + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + qcom,ee = <0>; ++ qcom,num-ees = <4>; ++ num-channels = <16>; + qcom,controlled-remotely; + iommus = <&apps_smmu 0x584 0x11>, + <&apps_smmu 0x588 0x0>, +diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi +index eac8de4005d82f..ac3e00ad417719 100644 +--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi +@@ -1957,6 +1957,8 @@ cryptobam: dma-controller@1dc4000 { + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + qcom,ee = <0>; ++ qcom,num-ees = <4>; ++ num-channels = <20>; + qcom,controlled-remotely; + iommus = <&apps_smmu 0x480 0x0>, + <&apps_smmu 0x481 0x0>; +diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi +index 86684cb9a93256..c8a2a76a98f000 100644 +--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi ++++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi +@@ -2533,6 +2533,8 @@ cryptobam: dma-controller@1dc4000 { + <&apps_smmu 0x481 0>; + + qcom,ee = <0>; ++ qcom,num-ees = <4>; ++ num-channels = <20>; + qcom,controlled-remotely; + }; + +diff --git a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts +index 5e3970b26e2f95..f5063a0df9fbfa 100644 +--- a/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts ++++ b/arch/arm64/boot/dts/qcom/x1e001de-devkit.dts +@@ -507,6 +507,7 @@ vreg_l12b_1p2: ldo12 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ regulator-always-on; + }; + + vreg_l13b_3p0: ldo13 { +@@ -528,6 +529,7 @@ vreg_l15b_1p8: ldo15 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ regulator-always-on; + }; + + vreg_l16b_2p9: ldo16 { +@@ -745,8 +747,8 @@ vreg_l1j_0p8: ldo1 { + + vreg_l2j_1p2: ldo2 { + regulator-name = "vreg_l2j_1p2"; +- regulator-min-microvolt = <1200000>; +- regulator-max-microvolt = <1200000>; ++ regulator-min-microvolt = <1256000>; ++ regulator-max-microvolt = <1256000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + +diff --git a/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts b/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts +index 53781f9b13af3e..f53067463b7601 100644 +--- a/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts ++++ b/arch/arm64/boot/dts/qcom/x1e80100-asus-vivobook-s15.dts +@@ -330,8 +330,8 @@ vreg_l1j_0p8: ldo1 { + + vreg_l2j_1p2: ldo2 { + regulator-name = "vreg_l2j_1p2"; +- regulator-min-microvolt = <1200000>; +- regulator-max-microvolt = <1200000>; ++ regulator-min-microvolt = <1256000>; ++ regulator-max-microvolt = <1256000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + +diff --git a/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts b/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts +index 86e87f03b0ec61..90f588ed7d63d7 100644 +--- a/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts ++++ b/arch/arm64/boot/dts/qcom/x1e80100-dell-xps13-9345.dts +@@ -359,6 +359,7 @@ vreg_l12b_1p2: ldo12 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ regulator-always-on; + }; + + vreg_l13b_3p0: ldo13 { +@@ -380,6 +381,7 @@ vreg_l15b_1p8: ldo15 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ regulator-always-on; + }; + + vreg_l17b_2p5: ldo17 { +diff --git a/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts b/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts +index cd860a246c450b..929da9ecddc47c 100644 +--- a/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts ++++ b/arch/arm64/boot/dts/qcom/x1e80100-hp-omnibook-x14.dts +@@ -633,6 +633,7 @@ vreg_l12b_1p2: ldo12 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ regulator-always-on; + }; + + vreg_l13b_3p0: ldo13 { +@@ -654,6 +655,7 @@ vreg_l15b_1p8: ldo15 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ regulator-always-on; + }; + + vreg_l16b_2p9: ldo16 { +@@ -871,8 +873,8 @@ vreg_l1j_0p8: ldo1 { + + vreg_l2j_1p2: ldo2 { + regulator-name = "vreg_l2j_1p2"; +- regulator-min-microvolt = <1200000>; +- regulator-max-microvolt = <1200000>; ++ regulator-min-microvolt = <1256000>; ++ regulator-max-microvolt = <1256000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + +@@ -1352,18 +1354,22 @@ &remoteproc_cdsp { + status = "okay"; + }; + ++&smb2360_0 { ++ status = "okay"; ++}; ++ + &smb2360_0_eusb2_repeater { + vdd18-supply = <&vreg_l3d_1p8>; + vdd3-supply = <&vreg_l2b_3p0>; ++}; + ++&smb2360_1 { + status = "okay"; + }; + + &smb2360_1_eusb2_repeater { + vdd18-supply = <&vreg_l3d_1p8>; + vdd3-supply = <&vreg_l14b_3p0>; +- +- status = "okay"; + }; + + &swr0 { +diff --git a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts +index a3d53f2ba2c3d0..744a66ae5bdc84 100644 +--- a/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts ++++ b/arch/arm64/boot/dts/qcom/x1e80100-lenovo-yoga-slim7x.dts +@@ -290,6 +290,7 @@ vreg_l12b_1p2: ldo12 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ regulator-always-on; + }; + + vreg_l14b_3p0: ldo14 { +@@ -304,8 +305,8 @@ vreg_l15b_1p8: ldo15 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ regulator-always-on; + }; +- + }; + + regulators-1 { +@@ -508,8 +509,8 @@ vreg_l1j_0p8: ldo1 { + + vreg_l2j_1p2: ldo2 { + regulator-name = "vreg_l2j_1p2"; +- regulator-min-microvolt = <1200000>; +- regulator-max-microvolt = <1200000>; ++ regulator-min-microvolt = <1256000>; ++ regulator-max-microvolt = <1256000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + +diff --git a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts +index ec594628304a9a..f06f4547884683 100644 +--- a/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts ++++ b/arch/arm64/boot/dts/qcom/x1e80100-qcp.dts +@@ -437,6 +437,7 @@ vreg_l12b_1p2: ldo12 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ regulator-always-on; + }; + + vreg_l13b_3p0: ldo13 { +@@ -458,6 +459,7 @@ vreg_l15b_1p8: ldo15 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; ++ regulator-always-on; + }; + + vreg_l16b_2p9: ldo16 { +@@ -675,8 +677,8 @@ vreg_l1j_0p8: ldo1 { + + vreg_l2j_1p2: ldo2 { + regulator-name = "vreg_l2j_1p2"; +- regulator-min-microvolt = <1200000>; +- regulator-max-microvolt = <1200000>; ++ regulator-min-microvolt = <1256000>; ++ regulator-max-microvolt = <1256000>; + regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; + }; + +diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi +index 4936fa5b98ff7a..5aeecf711340d2 100644 +--- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi ++++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi +@@ -20,6 +20,7 @@ + #include <dt-bindings/soc/qcom,gpr.h> + #include <dt-bindings/soc/qcom,rpmh-rsc.h> + #include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h> ++#include <dt-bindings/thermal/thermal.h> + + / { + interrupt-parent = <&intc>; +@@ -3125,7 +3126,7 @@ pcie3: pcie@1bd0000 { + device_type = "pci"; + compatible = "qcom,pcie-x1e80100"; + reg = <0x0 0x01bd0000 0x0 0x3000>, +- <0x0 0x78000000 0x0 0xf1d>, ++ <0x0 0x78000000 0x0 0xf20>, + <0x0 0x78000f40 0x0 0xa8>, + <0x0 0x78001000 0x0 0x1000>, + <0x0 0x78100000 0x0 0x100000>, +@@ -8457,8 +8458,8 @@ trip-point0 { + }; + + aoss0-critical { +- temperature = <125000>; +- hysteresis = <0>; ++ temperature = <115000>; ++ hysteresis = <1000>; + type = "critical"; + }; + }; +@@ -8483,7 +8484,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -8509,7 +8510,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -8535,7 +8536,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -8561,7 +8562,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -8587,7 +8588,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -8613,7 +8614,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -8639,7 +8640,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -8665,7 +8666,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -8683,8 +8684,8 @@ trip-point0 { + }; + + cpuss2-critical { +- temperature = <125000>; +- hysteresis = <0>; ++ temperature = <115000>; ++ hysteresis = <1000>; + type = "critical"; + }; + }; +@@ -8701,8 +8702,8 @@ trip-point0 { + }; + + cpuss2-critical { +- temperature = <125000>; +- hysteresis = <0>; ++ temperature = <115000>; ++ hysteresis = <1000>; + type = "critical"; + }; + }; +@@ -8719,7 +8720,7 @@ trip-point0 { + }; + + mem-critical { +- temperature = <125000>; ++ temperature = <115000>; + hysteresis = <0>; + type = "critical"; + }; +@@ -8727,15 +8728,19 @@ mem-critical { + }; + + video-thermal { +- polling-delay-passive = <250>; +- + thermal-sensors = <&tsens0 12>; + + trips { + trip-point0 { +- temperature = <125000>; ++ temperature = <90000>; ++ hysteresis = <2000>; ++ type = "hot"; ++ }; ++ ++ video-critical { ++ temperature = <115000>; + hysteresis = <1000>; +- type = "passive"; ++ type = "critical"; + }; + }; + }; +@@ -8751,8 +8756,8 @@ trip-point0 { + }; + + aoss0-critical { +- temperature = <125000>; +- hysteresis = <0>; ++ temperature = <115000>; ++ hysteresis = <1000>; + type = "critical"; + }; + }; +@@ -8777,7 +8782,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -8803,7 +8808,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -8829,7 +8834,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -8855,7 +8860,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -8881,7 +8886,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -8907,7 +8912,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -8933,7 +8938,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -8959,7 +8964,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -8977,8 +8982,8 @@ trip-point0 { + }; + + cpuss2-critical { +- temperature = <125000>; +- hysteresis = <0>; ++ temperature = <115000>; ++ hysteresis = <1000>; + type = "critical"; + }; + }; +@@ -8995,8 +9000,8 @@ trip-point0 { + }; + + cpuss2-critical { +- temperature = <125000>; +- hysteresis = <0>; ++ temperature = <115000>; ++ hysteresis = <1000>; + type = "critical"; + }; + }; +@@ -9013,8 +9018,8 @@ trip-point0 { + }; + + aoss0-critical { +- temperature = <125000>; +- hysteresis = <0>; ++ temperature = <115000>; ++ hysteresis = <1000>; + type = "critical"; + }; + }; +@@ -9039,7 +9044,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -9065,7 +9070,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -9091,7 +9096,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -9117,7 +9122,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -9143,7 +9148,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -9169,7 +9174,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -9195,7 +9200,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -9221,7 +9226,7 @@ trip-point1 { + }; + + cpu-critical { +- temperature = <110000>; ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -9239,8 +9244,8 @@ trip-point0 { + }; + + cpuss2-critical { +- temperature = <125000>; +- hysteresis = <0>; ++ temperature = <115000>; ++ hysteresis = <1000>; + type = "critical"; + }; + }; +@@ -9257,8 +9262,8 @@ trip-point0 { + }; + + cpuss2-critical { +- temperature = <125000>; +- hysteresis = <0>; ++ temperature = <115000>; ++ hysteresis = <1000>; + type = "critical"; + }; + }; +@@ -9275,8 +9280,8 @@ trip-point0 { + }; + + aoss0-critical { +- temperature = <125000>; +- hysteresis = <0>; ++ temperature = <115000>; ++ hysteresis = <1000>; + type = "critical"; + }; + }; +@@ -9293,8 +9298,8 @@ trip-point0 { + }; + + nsp0-critical { +- temperature = <125000>; +- hysteresis = <0>; ++ temperature = <115000>; ++ hysteresis = <1000>; + type = "critical"; + }; + }; +@@ -9311,8 +9316,8 @@ trip-point0 { + }; + + nsp1-critical { +- temperature = <125000>; +- hysteresis = <0>; ++ temperature = <115000>; ++ hysteresis = <1000>; + type = "critical"; + }; + }; +@@ -9329,8 +9334,8 @@ trip-point0 { + }; + + nsp2-critical { +- temperature = <125000>; +- hysteresis = <0>; ++ temperature = <115000>; ++ hysteresis = <1000>; + type = "critical"; + }; + }; +@@ -9347,33 +9352,34 @@ trip-point0 { + }; + + nsp3-critical { +- temperature = <125000>; +- hysteresis = <0>; ++ temperature = <115000>; ++ hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + gpuss-0-thermal { +- polling-delay-passive = <10>; ++ polling-delay-passive = <200>; + + thermal-sensors = <&tsens3 5>; + +- trips { +- trip-point0 { +- temperature = <85000>; +- hysteresis = <1000>; +- type = "passive"; ++ cooling-maps { ++ map0 { ++ trip = <&gpuss0_alert0>; ++ cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; ++ }; + +- trip-point1 { +- temperature = <90000>; ++ trips { ++ gpuss0_alert0: trip-point0 { ++ temperature = <95000>; + hysteresis = <1000>; +- type = "hot"; ++ type = "passive"; + }; + +- trip-point2 { +- temperature = <125000>; ++ gpu-critical { ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -9381,25 +9387,26 @@ trip-point2 { + }; + + gpuss-1-thermal { +- polling-delay-passive = <10>; ++ polling-delay-passive = <200>; + + thermal-sensors = <&tsens3 6>; + +- trips { +- trip-point0 { +- temperature = <85000>; +- hysteresis = <1000>; +- type = "passive"; ++ cooling-maps { ++ map0 { ++ trip = <&gpuss1_alert0>; ++ cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; ++ }; + +- trip-point1 { +- temperature = <90000>; ++ trips { ++ gpuss1_alert0: trip-point0 { ++ temperature = <95000>; + hysteresis = <1000>; +- type = "hot"; ++ type = "passive"; + }; + +- trip-point2 { +- temperature = <125000>; ++ gpu-critical { ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -9407,25 +9414,26 @@ trip-point2 { + }; + + gpuss-2-thermal { +- polling-delay-passive = <10>; ++ polling-delay-passive = <200>; + + thermal-sensors = <&tsens3 7>; + +- trips { +- trip-point0 { +- temperature = <85000>; +- hysteresis = <1000>; +- type = "passive"; ++ cooling-maps { ++ map0 { ++ trip = <&gpuss2_alert0>; ++ cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; ++ }; + +- trip-point1 { +- temperature = <90000>; ++ trips { ++ gpuss2_alert0: trip-point0 { ++ temperature = <95000>; + hysteresis = <1000>; +- type = "hot"; ++ type = "passive"; + }; + +- trip-point2 { +- temperature = <125000>; ++ gpu-critical { ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -9433,25 +9441,26 @@ trip-point2 { + }; + + gpuss-3-thermal { +- polling-delay-passive = <10>; ++ polling-delay-passive = <200>; + + thermal-sensors = <&tsens3 8>; + +- trips { +- trip-point0 { +- temperature = <85000>; +- hysteresis = <1000>; +- type = "passive"; ++ cooling-maps { ++ map0 { ++ trip = <&gpuss3_alert0>; ++ cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; ++ }; + +- trip-point1 { +- temperature = <90000>; ++ trips { ++ gpuss3_alert0: trip-point0 { ++ temperature = <95000>; + hysteresis = <1000>; +- type = "hot"; ++ type = "passive"; + }; + +- trip-point2 { +- temperature = <125000>; ++ gpu-critical { ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -9459,25 +9468,26 @@ trip-point2 { + }; + + gpuss-4-thermal { +- polling-delay-passive = <10>; ++ polling-delay-passive = <200>; + + thermal-sensors = <&tsens3 9>; + +- trips { +- trip-point0 { +- temperature = <85000>; +- hysteresis = <1000>; +- type = "passive"; ++ cooling-maps { ++ map0 { ++ trip = <&gpuss4_alert0>; ++ cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; ++ }; + +- trip-point1 { +- temperature = <90000>; ++ trips { ++ gpuss4_alert0: trip-point0 { ++ temperature = <95000>; + hysteresis = <1000>; +- type = "hot"; ++ type = "passive"; + }; + +- trip-point2 { +- temperature = <125000>; ++ gpu-critical { ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -9485,25 +9495,26 @@ trip-point2 { + }; + + gpuss-5-thermal { +- polling-delay-passive = <10>; ++ polling-delay-passive = <200>; + + thermal-sensors = <&tsens3 10>; + +- trips { +- trip-point0 { +- temperature = <85000>; +- hysteresis = <1000>; +- type = "passive"; ++ cooling-maps { ++ map0 { ++ trip = <&gpuss5_alert0>; ++ cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; ++ }; + +- trip-point1 { +- temperature = <90000>; ++ trips { ++ gpuss5_alert0: trip-point0 { ++ temperature = <95000>; + hysteresis = <1000>; +- type = "hot"; ++ type = "passive"; + }; + +- trip-point2 { +- temperature = <125000>; ++ gpu-critical { ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -9511,25 +9522,26 @@ trip-point2 { + }; + + gpuss-6-thermal { +- polling-delay-passive = <10>; ++ polling-delay-passive = <200>; + + thermal-sensors = <&tsens3 11>; + +- trips { +- trip-point0 { +- temperature = <85000>; +- hysteresis = <1000>; +- type = "passive"; ++ cooling-maps { ++ map0 { ++ trip = <&gpuss6_alert0>; ++ cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; ++ }; + +- trip-point1 { +- temperature = <90000>; ++ trips { ++ gpuss6_alert0: trip-point0 { ++ temperature = <95000>; + hysteresis = <1000>; +- type = "hot"; ++ type = "passive"; + }; + +- trip-point2 { +- temperature = <125000>; ++ gpu-critical { ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -9537,25 +9549,26 @@ trip-point2 { + }; + + gpuss-7-thermal { +- polling-delay-passive = <10>; ++ polling-delay-passive = <200>; + + thermal-sensors = <&tsens3 12>; + +- trips { +- trip-point0 { +- temperature = <85000>; +- hysteresis = <1000>; +- type = "passive"; ++ cooling-maps { ++ map0 { ++ trip = <&gpuss7_alert0>; ++ cooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; ++ }; + +- trip-point1 { +- temperature = <90000>; ++ trips { ++ gpuss7_alert0: trip-point0 { ++ temperature = <95000>; + hysteresis = <1000>; +- type = "hot"; ++ type = "passive"; + }; + +- trip-point2 { +- temperature = <125000>; ++ gpu-critical { ++ temperature = <115000>; + hysteresis = <1000>; + type = "critical"; + }; +@@ -9574,7 +9587,7 @@ trip-point0 { + + camera0-critical { + temperature = <115000>; +- hysteresis = <0>; ++ hysteresis = <1000>; + type = "critical"; + }; + }; +@@ -9592,7 +9605,7 @@ trip-point0 { + + camera0-critical { + temperature = <115000>; +- hysteresis = <0>; ++ hysteresis = <1000>; + type = "critical"; + }; + }; +diff --git a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi +index e00fbaa8acc168..314d9dfdba5732 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi +@@ -60,16 +60,6 @@ vcc3v3_sys: regulator-vcc3v3-sys { + vin-supply = <&vcc5v0_sys>; + }; + +- vcc5v0_host: regulator-vcc5v0-host { +- compatible = "regulator-fixed"; +- gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_LOW>; +- pinctrl-names = "default"; +- pinctrl-0 = <&vcc5v0_host_en>; +- regulator-name = "vcc5v0_host"; +- regulator-always-on; +- vin-supply = <&vcc5v0_sys>; +- }; +- + vcc5v0_sys: regulator-vcc5v0-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; +@@ -527,10 +517,10 @@ pmic_int_l: pmic-int-l { + }; + }; + +- usb2 { +- vcc5v0_host_en: vcc5v0-host-en { ++ usb { ++ cy3304_reset: cy3304-reset { + rockchip,pins = +- <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; ++ <4 RK_PA3 RK_FUNC_GPIO &pcfg_output_high>; + }; + }; + +@@ -597,7 +587,6 @@ u2phy1_otg: otg-port { + }; + + u2phy1_host: host-port { +- phy-supply = <&vcc5v0_host>; + status = "okay"; + }; + }; +@@ -609,6 +598,29 @@ &usbdrd3_1 { + &usbdrd_dwc3_1 { + status = "okay"; + dr_mode = "host"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&cy3304_reset>; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ hub_2_0: hub@1 { ++ compatible = "usb4b4,6502", "usb4b4,6506"; ++ reg = <1>; ++ peer-hub = <&hub_3_0>; ++ reset-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>; ++ vdd-supply = <&vcc1v2_phy>; ++ vdd2-supply = <&vcc3v3_sys>; ++ ++ }; ++ ++ hub_3_0: hub@2 { ++ compatible = "usb4b4,6500", "usb4b4,6504"; ++ reg = <2>; ++ peer-hub = <&hub_2_0>; ++ reset-gpios = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>; ++ vdd-supply = <&vcc1v2_phy>; ++ vdd2-supply = <&vcc3v3_sys>; ++ }; + }; + + &usb_host1_ehci { +diff --git a/arch/arm64/boot/dts/rockchip/rk3576.dtsi b/arch/arm64/boot/dts/rockchip/rk3576.dtsi +index ebb5fc8bb8b136..3824242f8ae88a 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3576.dtsi ++++ b/arch/arm64/boot/dts/rockchip/rk3576.dtsi +@@ -1364,6 +1364,7 @@ sfc1: spi@2a300000 { + interrupts = <GIC_SPI 255 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_FSPI1_X2>, <&cru HCLK_FSPI1>; + clock-names = "clk_sfc", "hclk_sfc"; ++ power-domains = <&power RK3576_PD_SDGMAC>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +@@ -1414,6 +1415,7 @@ sfc0: spi@2a340000 { + interrupts = <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cru SCLK_FSPI_X2>, <&cru HCLK_FSPI>; + clock-names = "clk_sfc", "hclk_sfc"; ++ power-domains = <&power RK3576_PD_NVM>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; +diff --git a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +index 7d355aa73ea211..0c286f600296cd 100644 +--- a/arch/arm64/boot/dts/ti/k3-am62-main.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-am62-main.dtsi +@@ -552,8 +552,6 @@ sdhci0: mmc@fa10000 { + power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 57 5>, <&k3_clks 57 6>; + clock-names = "clk_ahb", "clk_xin"; +- assigned-clocks = <&k3_clks 57 6>; +- assigned-clock-parents = <&k3_clks 57 8>; + bus-width = <8>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; +diff --git a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +index a1daba7b1fad5d..455ccc770f16a1 100644 +--- a/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-am62a-main.dtsi +@@ -575,8 +575,6 @@ sdhci0: mmc@fa10000 { + power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 57 5>, <&k3_clks 57 6>; + clock-names = "clk_ahb", "clk_xin"; +- assigned-clocks = <&k3_clks 57 6>; +- assigned-clock-parents = <&k3_clks 57 8>; + bus-width = <8>; + mmc-hs200-1_8v; + ti,clkbuf-sel = <0x7>; +diff --git a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi +index 6e3beb5c2e010e..f9b5c97518d68f 100644 +--- a/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi +@@ -564,8 +564,6 @@ sdhci0: mmc@fa10000 { + power-domains = <&k3_pds 57 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 57 1>, <&k3_clks 57 2>; + clock-names = "clk_ahb", "clk_xin"; +- assigned-clocks = <&k3_clks 57 2>; +- assigned-clock-parents = <&k3_clks 57 4>; + bus-width = <8>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; +diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso b/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso +index 76ca02127f95ff..dd090813a32d61 100644 +--- a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso ++++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-imx219.dtso +@@ -22,7 +22,7 @@ &main_i2c2 { + #size-cells = <0>; + status = "okay"; + +- i2c-switch@71 { ++ i2c-mux@71 { + compatible = "nxp,pca9543"; + #address-cells = <1>; + #size-cells = <0>; +@@ -39,7 +39,6 @@ ov5640: camera@10 { + reg = <0x10>; + + clocks = <&clk_imx219_fixed>; +- clock-names = "xclk"; + + reset-gpios = <&exp1 13 GPIO_ACTIVE_HIGH>; + +diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso b/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso +index ccc7f5e43184fa..7fc7c95f5cd578 100644 +--- a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso ++++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-ov5640.dtso +@@ -22,7 +22,7 @@ &main_i2c2 { + #size-cells = <0>; + status = "okay"; + +- i2c-switch@71 { ++ i2c-mux@71 { + compatible = "nxp,pca9543"; + #address-cells = <1>; + #size-cells = <0>; +diff --git a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso b/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso +index 4eaf9d757dd0ad..b6bfdfbbdd984a 100644 +--- a/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso ++++ b/arch/arm64/boot/dts/ti/k3-am62x-sk-csi2-tevi-ov5640.dtso +@@ -22,7 +22,7 @@ &main_i2c2 { + #size-cells = <0>; + status = "okay"; + +- i2c-switch@71 { ++ i2c-mux@71 { + compatible = "nxp,pca9543"; + #address-cells = <1>; + #size-cells = <0>; +diff --git a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +index 94a812a1355baf..5ebf7ada6e4851 100644 +--- a/arch/arm64/boot/dts/ti/k3-am65-main.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-am65-main.dtsi +@@ -449,6 +449,8 @@ sdhci0: mmc@4f80000 { + ti,otap-del-sel-mmc-hs = <0x0>; + ti,otap-del-sel-ddr52 = <0x5>; + ti,otap-del-sel-hs200 = <0x5>; ++ ti,itap-del-sel-legacy = <0xa>; ++ ti,itap-del-sel-mmc-hs = <0x1>; + ti,itap-del-sel-ddr52 = <0x0>; + dma-coherent; + status = "disabled"; +diff --git a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts +index 11522b36e0cece..5fa70a874d7b4d 100644 +--- a/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts ++++ b/arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts +@@ -44,6 +44,17 @@ vusb_main: regulator-vusb-main5v0 { + regulator-boot-on; + }; + ++ vsys_5v0: regulator-vsys5v0 { ++ /* Output of LM61460 */ ++ compatible = "regulator-fixed"; ++ regulator-name = "vsys_5v0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vusb_main>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ + vsys_3v3: regulator-vsys3v3 { + /* Output of LM5141 */ + compatible = "regulator-fixed"; +@@ -76,7 +87,7 @@ vdd_sd_dv: regulator-tlv71033 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; +- vin-supply = <&vsys_3v3>; ++ vin-supply = <&vsys_5v0>; + gpios = <&main_gpio0 49 GPIO_ACTIVE_HIGH>; + states = <1800000 0x0>, + <3300000 0x1>; +diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso b/arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso +index 47bb5480b5b006..4eb3cffab0321d 100644 +--- a/arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso ++++ b/arch/arm64/boot/dts/ti/k3-j721e-sk-csi2-dual-imx219.dtso +@@ -19,6 +19,33 @@ clk_imx219_fixed: imx219-xclk { + #clock-cells = <0>; + clock-frequency = <24000000>; + }; ++ ++ reg_2p8v: regulator-2p8v { ++ compatible = "regulator-fixed"; ++ regulator-name = "2P8V"; ++ regulator-min-microvolt = <2800000>; ++ regulator-max-microvolt = <2800000>; ++ vin-supply = <&vdd_sd_dv>; ++ regulator-always-on; ++ }; ++ ++ reg_1p8v: regulator-1p8v { ++ compatible = "regulator-fixed"; ++ regulator-name = "1P8V"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ vin-supply = <&vdd_sd_dv>; ++ regulator-always-on; ++ }; ++ ++ reg_1p2v: regulator-1p2v { ++ compatible = "regulator-fixed"; ++ regulator-name = "1P2V"; ++ regulator-min-microvolt = <1200000>; ++ regulator-max-microvolt = <1200000>; ++ vin-supply = <&vdd_sd_dv>; ++ regulator-always-on; ++ }; + }; + + &csi_mux { +@@ -34,7 +61,9 @@ imx219_0: imx219-0@10 { + reg = <0x10>; + + clocks = <&clk_imx219_fixed>; +- clock-names = "xclk"; ++ VANA-supply = <®_2p8v>; ++ VDIG-supply = <®_1p8v>; ++ VDDL-supply = <®_1p2v>; + + port { + csi2_cam0: endpoint { +@@ -56,7 +85,9 @@ imx219_1: imx219-1@10 { + reg = <0x10>; + + clocks = <&clk_imx219_fixed>; +- clock-names = "xclk"; ++ VANA-supply = <®_2p8v>; ++ VDIG-supply = <®_1p8v>; ++ VDDL-supply = <®_1p2v>; + + port { + csi2_cam1: endpoint { +diff --git a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +index 440ef57be2943c..ffef3d1cfd5532 100644 +--- a/arch/arm64/boot/dts/ti/k3-j721e-sk.dts ++++ b/arch/arm64/boot/dts/ti/k3-j721e-sk.dts +@@ -184,6 +184,17 @@ vsys_3v3: fixedregulator-vsys3v3 { + regulator-boot-on; + }; + ++ vsys_5v0: fixedregulator-vsys5v0 { ++ /* Output of LM61460 */ ++ compatible = "regulator-fixed"; ++ regulator-name = "vsys_5v0"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ vin-supply = <&vusb_main>; ++ regulator-always-on; ++ regulator-boot-on; ++ }; ++ + vdd_mmc1: fixedregulator-sd { + compatible = "regulator-fixed"; + pinctrl-names = "default"; +@@ -211,6 +222,20 @@ vdd_sd_dv_alt: gpio-regulator-tps659411 { + <3300000 0x1>; + }; + ++ vdd_sd_dv: gpio-regulator-TLV71033 { ++ compatible = "regulator-gpio"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&vdd_sd_dv_pins_default>; ++ regulator-name = "tlv71033"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-boot-on; ++ vin-supply = <&vsys_5v0>; ++ gpios = <&main_gpio0 118 GPIO_ACTIVE_HIGH>; ++ states = <1800000 0x0>, ++ <3300000 0x1>; ++ }; ++ + transceiver1: can-phy1 { + compatible = "ti,tcan1042"; + #phy-cells = <0>; +@@ -613,6 +638,12 @@ J721E_WKUP_IOPAD(0xd4, PIN_OUTPUT, 7) /* (G26) WKUP_GPIO0_9 */ + >; + }; + ++ vdd_sd_dv_pins_default: vdd-sd-dv-default-pins { ++ pinctrl-single,pins = < ++ J721E_IOPAD(0x1dc, PIN_OUTPUT, 7) /* (Y1) SPI1_CLK.GPIO0_118 */ ++ >; ++ }; ++ + wkup_uart0_pins_default: wkup-uart0-default-pins { + pinctrl-single,pins = < + J721E_WKUP_IOPAD(0xa0, PIN_INPUT, 0) /* (J29) WKUP_UART0_RXD */ +diff --git a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts +index 2127316f36a34b..0bf2e182166244 100644 +--- a/arch/arm64/boot/dts/ti/k3-j722s-evm.dts ++++ b/arch/arm64/boot/dts/ti/k3-j722s-evm.dts +@@ -843,6 +843,10 @@ &serdes_ln_ctrl { + <J722S_SERDES1_LANE0_PCIE0_LANE0>; + }; + ++&serdes_wiz0 { ++ status = "okay"; ++}; ++ + &serdes0 { + status = "okay"; + serdes0_usb_link: phy@0 { +@@ -854,6 +858,10 @@ serdes0_usb_link: phy@0 { + }; + }; + ++&serdes_wiz1 { ++ status = "okay"; ++}; ++ + &serdes1 { + status = "okay"; + serdes1_pcie_link: phy@0 { +diff --git a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi +index 6850f50530f12b..beda9e40e931b4 100644 +--- a/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-j722s-main.dtsi +@@ -32,6 +32,8 @@ serdes_wiz0: phy@f000000 { + assigned-clocks = <&k3_clks 279 1>; + assigned-clock-parents = <&k3_clks 279 5>; + ++ status = "disabled"; ++ + serdes0: serdes@f000000 { + compatible = "ti,j721e-serdes-10g"; + reg = <0x0f000000 0x00010000>; +@@ -70,6 +72,8 @@ serdes_wiz1: phy@f010000 { + assigned-clocks = <&k3_clks 280 1>; + assigned-clock-parents = <&k3_clks 280 5>; + ++ status = "disabled"; ++ + serdes1: serdes@f010000 { + compatible = "ti,j721e-serdes-10g"; + reg = <0x0f010000 0x00010000>; +diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi +index 1944616ab3579a..1fc0a11c5ab4a9 100644 +--- a/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-j784s4-j742s2-main-common.dtsi +@@ -77,7 +77,7 @@ pcie1_ctrl: pcie1-ctrl@4074 { + + serdes_ln_ctrl: mux-controller@4080 { + compatible = "reg-mux"; +- reg = <0x00004080 0x30>; ++ reg = <0x00004080 0x50>; + #mux-control-cells = <1>; + mux-reg-masks = <0x0 0x3>, <0x4 0x3>, /* SERDES0 lane0/1 select */ + <0x8 0x3>, <0xc 0x3>, /* SERDES0 lane2/3 select */ +diff --git a/drivers/iommu/iommu.c b/drivers/iommu/iommu.c +index 9d728800a862e6..5bc2fc969494f5 100644 +--- a/drivers/iommu/iommu.c ++++ b/drivers/iommu/iommu.c +@@ -277,6 +277,8 @@ int iommu_device_register(struct iommu_device *iommu, + err = bus_iommu_probe(iommu_buses[i]); + if (err) + iommu_device_unregister(iommu); ++ else ++ WRITE_ONCE(iommu->ready, true); + return err; + } + EXPORT_SYMBOL_GPL(iommu_device_register); +@@ -422,13 +424,15 @@ static int iommu_init_device(struct device *dev) + * is buried in the bus dma_configure path. Properly unpicking that is + * still a big job, so for now just invoke the whole thing. The device + * already having a driver bound means dma_configure has already run and +- * either found no IOMMU to wait for, or we're in its replay call right +- * now, so either way there's no point calling it again. ++ * found no IOMMU to wait for, so there's no point calling it again. + */ +- if (!dev->driver && dev->bus->dma_configure) { ++ if (!dev->iommu->fwspec && !dev->driver && dev->bus->dma_configure) { + mutex_unlock(&iommu_probe_device_lock); + dev->bus->dma_configure(dev); + mutex_lock(&iommu_probe_device_lock); ++ /* If another instance finished the job for us, skip it */ ++ if (!dev->iommu || dev->iommu_group) ++ return -ENODEV; + } + /* + * At this point, relevant devices either now have a fwspec which will +@@ -2830,31 +2834,39 @@ bool iommu_default_passthrough(void) + } + EXPORT_SYMBOL_GPL(iommu_default_passthrough); + +-const struct iommu_ops *iommu_ops_from_fwnode(const struct fwnode_handle *fwnode) ++static const struct iommu_device *iommu_from_fwnode(const struct fwnode_handle *fwnode) + { +- const struct iommu_ops *ops = NULL; +- struct iommu_device *iommu; ++ const struct iommu_device *iommu, *ret = NULL; + + spin_lock(&iommu_device_lock); + list_for_each_entry(iommu, &iommu_device_list, list) + if (iommu->fwnode == fwnode) { +- ops = iommu->ops; ++ ret = iommu; + break; + } + spin_unlock(&iommu_device_lock); +- return ops; ++ return ret; ++} ++ ++const struct iommu_ops *iommu_ops_from_fwnode(const struct fwnode_handle *fwnode) ++{ ++ const struct iommu_device *iommu = iommu_from_fwnode(fwnode); ++ ++ return iommu ? iommu->ops : NULL; + } + + int iommu_fwspec_init(struct device *dev, struct fwnode_handle *iommu_fwnode) + { +- const struct iommu_ops *ops = iommu_ops_from_fwnode(iommu_fwnode); ++ const struct iommu_device *iommu = iommu_from_fwnode(iommu_fwnode); + struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev); + +- if (!ops) ++ if (!iommu) + return driver_deferred_probe_check_state(dev); ++ if (!dev->iommu && !READ_ONCE(iommu->ready)) ++ return -EPROBE_DEFER; + + if (fwspec) +- return ops == iommu_fwspec_ops(fwspec) ? 0 : -EINVAL; ++ return iommu->ops == iommu_fwspec_ops(fwspec) ? 0 : -EINVAL; + + if (!dev_iommu_get(dev)) + return -ENOMEM; +diff --git a/drivers/perf/arm-cmn.c b/drivers/perf/arm-cmn.c +index d4fe30ff225b6a..403850b1040d3d 100644 +--- a/drivers/perf/arm-cmn.c ++++ b/drivers/perf/arm-cmn.c +@@ -727,8 +727,8 @@ static umode_t arm_cmn_event_attr_is_visible(struct kobject *kobj, + + if ((chan == 5 && cmn->rsp_vc_num < 2) || + (chan == 6 && cmn->dat_vc_num < 2) || +- (chan == 7 && cmn->snp_vc_num < 2) || +- (chan == 8 && cmn->req_vc_num < 2)) ++ (chan == 7 && cmn->req_vc_num < 2) || ++ (chan == 8 && cmn->snp_vc_num < 2)) + return 0; + } + +@@ -882,8 +882,8 @@ static umode_t arm_cmn_event_attr_is_visible(struct kobject *kobj, + _CMN_EVENT_XP(pub_##_name, (_event) | (4 << 5)), \ + _CMN_EVENT_XP(rsp2_##_name, (_event) | (5 << 5)), \ + _CMN_EVENT_XP(dat2_##_name, (_event) | (6 << 5)), \ +- _CMN_EVENT_XP(snp2_##_name, (_event) | (7 << 5)), \ +- _CMN_EVENT_XP(req2_##_name, (_event) | (8 << 5)) ++ _CMN_EVENT_XP(req2_##_name, (_event) | (7 << 5)), \ ++ _CMN_EVENT_XP(snp2_##_name, (_event) | (8 << 5)) + + #define CMN_EVENT_XP_DAT(_name, _event) \ + _CMN_EVENT_XP_PORT(dat_##_name, (_event) | (3 << 5)), \ +@@ -2558,6 +2558,7 @@ static int arm_cmn_probe(struct platform_device *pdev) + + cmn->dev = &pdev->dev; + cmn->part = (unsigned long)device_get_match_data(cmn->dev); ++ cmn->cpu = cpumask_local_spread(0, dev_to_node(cmn->dev)); + platform_set_drvdata(pdev, cmn); + + if (cmn->part == PART_CMN600 && has_acpi_companion(cmn->dev)) { +@@ -2585,7 +2586,6 @@ static int arm_cmn_probe(struct platform_device *pdev) + if (err) + return err; + +- cmn->cpu = cpumask_local_spread(0, dev_to_node(cmn->dev)); + cmn->pmu = (struct pmu) { + .module = THIS_MODULE, + .parent = cmn->dev, +@@ -2651,6 +2651,7 @@ static const struct acpi_device_id arm_cmn_acpi_match[] = { + { "ARMHC600", PART_CMN600 }, + { "ARMHC650" }, + { "ARMHC700" }, ++ { "ARMHC003" }, + {} + }; + MODULE_DEVICE_TABLE(acpi, arm_cmn_acpi_match); +diff --git a/fs/coredump.c b/fs/coredump.c +index c33c177a701b3d..d740a04112663c 100644 +--- a/fs/coredump.c ++++ b/fs/coredump.c +@@ -43,6 +43,8 @@ + #include <linux/timekeeping.h> + #include <linux/sysctl.h> + #include <linux/elf.h> ++#include <linux/pidfs.h> ++#include <uapi/linux/pidfd.h> + + #include <linux/uaccess.h> + #include <asm/mmu_context.h> +@@ -60,6 +62,12 @@ static void free_vma_snapshot(struct coredump_params *cprm); + #define CORE_FILE_NOTE_SIZE_DEFAULT (4*1024*1024) + /* Define a reasonable max cap */ + #define CORE_FILE_NOTE_SIZE_MAX (16*1024*1024) ++/* ++ * File descriptor number for the pidfd for the thread-group leader of ++ * the coredumping task installed into the usermode helper's file ++ * descriptor table. ++ */ ++#define COREDUMP_PIDFD_NUMBER 3 + + static int core_uses_pid; + static unsigned int core_pipe_limit; +@@ -339,6 +347,27 @@ static int format_corename(struct core_name *cn, struct coredump_params *cprm, + case 'C': + err = cn_printf(cn, "%d", cprm->cpu); + break; ++ /* pidfd number */ ++ case 'F': { ++ /* ++ * Installing a pidfd only makes sense if ++ * we actually spawn a usermode helper. ++ */ ++ if (!ispipe) ++ break; ++ ++ /* ++ * Note that we'll install a pidfd for the ++ * thread-group leader. We know that task ++ * linkage hasn't been removed yet and even if ++ * this @current isn't the actual thread-group ++ * leader we know that the thread-group leader ++ * cannot be reaped until @current has exited. ++ */ ++ cprm->pid = task_tgid(current); ++ err = cn_printf(cn, "%d", COREDUMP_PIDFD_NUMBER); ++ break; ++ } + default: + break; + } +@@ -493,7 +522,7 @@ static void wait_for_dump_helpers(struct file *file) + } + + /* +- * umh_pipe_setup ++ * umh_coredump_setup + * helper function to customize the process used + * to collect the core in userspace. Specifically + * it sets up a pipe and installs it as fd 0 (stdin) +@@ -503,11 +532,32 @@ static void wait_for_dump_helpers(struct file *file) + * is a special value that we use to trap recursive + * core dumps + */ +-static int umh_pipe_setup(struct subprocess_info *info, struct cred *new) ++static int umh_coredump_setup(struct subprocess_info *info, struct cred *new) + { + struct file *files[2]; + struct coredump_params *cp = (struct coredump_params *)info->data; +- int err = create_pipe_files(files, 0); ++ int err; ++ ++ if (cp->pid) { ++ struct file *pidfs_file __free(fput) = NULL; ++ ++ pidfs_file = pidfs_alloc_file(cp->pid, 0); ++ if (IS_ERR(pidfs_file)) ++ return PTR_ERR(pidfs_file); ++ ++ /* ++ * Usermode helpers are childen of either ++ * system_unbound_wq or of kthreadd. So we know that ++ * we're starting off with a clean file descriptor ++ * table. So we should always be able to use ++ * COREDUMP_PIDFD_NUMBER as our file descriptor value. ++ */ ++ err = replace_fd(COREDUMP_PIDFD_NUMBER, pidfs_file, 0); ++ if (err < 0) ++ return err; ++ } ++ ++ err = create_pipe_files(files, 0); + if (err) + return err; + +@@ -515,10 +565,13 @@ static int umh_pipe_setup(struct subprocess_info *info, struct cred *new) + + err = replace_fd(0, files[0], 0); + fput(files[0]); ++ if (err < 0) ++ return err; ++ + /* and disallow core files too */ + current->signal->rlim[RLIMIT_CORE] = (struct rlimit){1, 1}; + +- return err; ++ return 0; + } + + void do_coredump(const kernel_siginfo_t *siginfo) +@@ -593,7 +646,7 @@ void do_coredump(const kernel_siginfo_t *siginfo) + } + + if (cprm.limit == 1) { +- /* See umh_pipe_setup() which sets RLIMIT_CORE = 1. ++ /* See umh_coredump_setup() which sets RLIMIT_CORE = 1. + * + * Normally core limits are irrelevant to pipes, since + * we're not writing to the file system, but we use +@@ -632,7 +685,7 @@ void do_coredump(const kernel_siginfo_t *siginfo) + retval = -ENOMEM; + sub_info = call_usermodehelper_setup(helper_argv[0], + helper_argv, NULL, GFP_KERNEL, +- umh_pipe_setup, NULL, &cprm); ++ umh_coredump_setup, NULL, &cprm); + if (sub_info) + retval = call_usermodehelper_exec(sub_info, + UMH_WAIT_EXEC); +diff --git a/fs/pidfs.c b/fs/pidfs.c +index d64a4cbeb0dafa..50e69a9e104a60 100644 +--- a/fs/pidfs.c ++++ b/fs/pidfs.c +@@ -888,6 +888,7 @@ struct file *pidfs_alloc_file(struct pid *pid, unsigned int flags) + return ERR_PTR(-ESRCH); + + flags &= ~PIDFD_CLONE; ++ flags |= O_RDWR; + pidfd_file = dentry_open(&path, flags, current_cred()); + /* Raise PIDFD_THREAD explicitly as do_dentry_open() strips it. */ + if (!IS_ERR(pidfd_file)) +diff --git a/include/linux/coredump.h b/include/linux/coredump.h +index 77e6e195d1d687..76e41805b92de9 100644 +--- a/include/linux/coredump.h ++++ b/include/linux/coredump.h +@@ -28,6 +28,7 @@ struct coredump_params { + int vma_count; + size_t vma_data_size; + struct core_vma_metadata *vma_meta; ++ struct pid *pid; + }; + + extern unsigned int core_file_note_size_limit; +diff --git a/include/linux/iommu.h b/include/linux/iommu.h +index 3a8d35d41fdad5..4273871845eebb 100644 +--- a/include/linux/iommu.h ++++ b/include/linux/iommu.h +@@ -750,6 +750,7 @@ struct iommu_domain_ops { + * @dev: struct device for sysfs handling + * @singleton_group: Used internally for drivers that have only one group + * @max_pasids: number of supported PASIDs ++ * @ready: set once iommu_device_register() has completed successfully + */ + struct iommu_device { + struct list_head list; +@@ -758,6 +759,7 @@ struct iommu_device { + struct device *dev; + struct iommu_group *singleton_group; + u32 max_pasids; ++ bool ready; + }; + + /** +diff --git a/net/sched/sch_hfsc.c b/net/sched/sch_hfsc.c +index 7986145a527cbe..5a7745170e84b1 100644 +--- a/net/sched/sch_hfsc.c ++++ b/net/sched/sch_hfsc.c +@@ -175,6 +175,11 @@ struct hfsc_sched { + + #define HT_INFINITY 0xffffffffffffffffULL /* infinite time value */ + ++static bool cl_in_el_or_vttree(struct hfsc_class *cl) ++{ ++ return ((cl->cl_flags & HFSC_FSC) && cl->cl_nactive) || ++ ((cl->cl_flags & HFSC_RSC) && !RB_EMPTY_NODE(&cl->el_node)); ++} + + /* + * eligible tree holds backlogged classes being sorted by their eligible times. +@@ -1040,6 +1045,8 @@ hfsc_change_class(struct Qdisc *sch, u32 classid, u32 parentid, + if (cl == NULL) + return -ENOBUFS; + ++ RB_CLEAR_NODE(&cl->el_node); ++ + err = tcf_block_get(&cl->block, &cl->filter_list, sch, extack); + if (err) { + kfree(cl); +@@ -1572,7 +1579,7 @@ hfsc_enqueue(struct sk_buff *skb, struct Qdisc *sch, struct sk_buff **to_free) + sch->qstats.backlog += len; + sch->q.qlen++; + +- if (first && !cl->cl_nactive) { ++ if (first && !cl_in_el_or_vttree(cl)) { + if (cl->cl_flags & HFSC_RSC) + init_ed(cl, len); + if (cl->cl_flags & HFSC_FSC)
