Hello. I was trying to find how the virtual (logical) addresses are calculated and passed on to cpu. In the load/store queee, after a request object is created, then the corresponding instruction is assigned a effective address from this request object, something like inst->effaddr=req->getVirt().I found setVirt(), the set virtual address function. But I cannot find who calls this setVirt() and where.
For example: ldr x0, [x1,#1024] // an ARM instruction Here, the address would be x1+1024. So the content of x1 register plus immediate 1024. How and where would this address calculation take place ? Where can I see the contents of x1 register is added with 1024 ? and who would call the setVirt() function ? As I understand, address calculation is ISA specific, and the dynamic/static instruction classes works with ISA files to get this done. I wanted to know how this works, the interface for connecting ISA features to cpu pipeline.
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