Hi all, I'm currently working on the O3 CPU model and want to issue random instructions in the IWE stage during the readyInsts issuing. It seems like the program forbids such actions and asserts that the instruction being issued is the oldest one. Am I looking in the wrong place to do this? Any help would be greatly appreciated.
Thanks, Ziyao
_______________________________________________ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le...@gem5.org