On 6/28/2023 9:42 AM, 中国石油大学张天 via gem5-users wrote:
Can gem5 be used to simulate bit-slice processors?
If you're up for defining a new cpu model - not a light undertaking - then I see no reason why not. If you're not already aware, gem5 is not a circuit level model. Its modules are written in C++ and the overall system is instantiated and components connected up using python scripts. You just need to be able to code the semantics of your cpu in C++. I would think that suitable bit masking, shifting, etc., would allow you to model a slice up to 64 bits wide fairly easily, and wider ones by using multiple precision arithmetic. You need to be able to describe the (logical) cpu state, the instructions (as macro-ops and micro-ops), decoding, addressing, faults, etc., in C++ (decoding and instruction descriptions are generally done using files in a particular format that use python to generate the tedious repetitive details). Does this help? If you're asking is there anything pre-built for this, I think the answer is no. Regards - Eliot Moss _______________________________________________ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users-le...@gem5.org
