Sorry, I should have clarified. I am using the RISCV ISA in gem5. On Wed, Mar 22, 2023, 5:44 AM Eliot Moss <m...@cs.umass.edu> wrote:
> On 3/22/2023 8:37 AM, Priyanka Ankolekar via gem5-users wrote: > > Thank you, Eliot. > > > > Is there a way to probe minstret CSR to get the retired instructions? > > ?? What ISA are you talking about? > > I doubt that gem5 would model such details of a processor > architecture. Maybe you should back up a little and tell > us what you're really trying to do, since neither the > retired instructions stats nor a full trace seem to meet > your need ... > > Best - Eliot Moss >
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