Hi,

Is there a way to simulate using DDR5 memory in gem5?


Currently, there is no DDR5 interface in gem5. I just pushed an in-progress
change here (
https://gem5-review.googlesource.com/c/public/gem5/+/68257/1/src/mem/DRAMInterface.py)
to support a single channel of DDR5.
This configuration still needs to be fully validated. But I will try to
merge it in the next few days (please, check back in a week or so).

Could you tell me in detail how to configure C code to access a specific
> address in memory to read and write data?


You can write or use any program/application accessing memory and use it as
a custom resource. If you do not care much about the CPU model, I suggest
looking at the traffic generator in gem5. You can find more information
about traffic generators here: https://www.youtube.com/watch?v=7QX-QdBtFGY

-Ayaz

On Mon, Feb 20, 2023 at 8:17 PM 한수진 via gem5-users <gem5-users@gem5.org>
wrote:

> Hi,
>
>
> I've been using gem5 simulator recently for some validation in my research.
>
> I have a question about using gem5, so I'm sending an email.
>
>
>
>
>
> 1.
>
>
> As a first question,
>
>
> Is there a way to simulate using DDR5 memory in gem5?
>
>
> I read the configuration of the different memory types available in gem5, but
> DDR5 memory type did not exist.
>
>
> Will DDR5 be updated? If so, when is it?
>
>
> If there is no update scheduled, is there any other way to simulate DDR5?
>
>
>
>
>
> 2.
>
>
> As a second question,
>
>
> I am trying to simulate a custom resource by direct C coding.
>
>
> How do I configure C code to make data read and write to a specific
> address in memory?
>
>
> Custom resource example provided by gem5 is simply a code that outputs
> "hello world" or performs addition and multiplication operations, so it is
> difficult to get ideas.
>
>
> Could you tell me in detail how to configure C code to access a specific
> address in memory to read and write data?
>
>
>
>
>
>
>
> Thank you in advance for your help!
>
>
>
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